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178 Commits

Author SHA1 Message Date
Chris Lattner
569bdc7bb7 add missing braces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34905 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 06:13:52 +00:00
Evan Cheng
58866f43fa How the heck did I forget patterns for llvm.x86.sse2.cmp.sd? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34434 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-20 00:39:09 +00:00
Evan Cheng
73d6cf12ad - FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before 
or'ing in the sign bit of operand 1.
- Tweaking: rather than left shift the sign bit, fp_extend operand 1 first
  before taking its sign bit if its type is smaller than that of operand 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32932 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-05 21:37:56 +00:00
Evan Cheng
68c47cba35 With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32900 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-05 07:55:56 +00:00
Evan Cheng
c9f0923f17 - Rename MOVDSS2DIrr to MOVSS2DIrr for consistency sake. 
- Add MOVDI2SSrm and MOVSS2DImr to fold load / store for i32 <-> f32 bit_convert
  patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32582 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-14 19:43:11 +00:00
Chris Lattner
f3597a13ae If we have ScalarSSE, we can select bitconvert into single instructions. 
This compiles bitcast.ll:test3/test4 into:

_test3:
        movd %xmm0, %eax
        ret
_test4:
        movd %edi, %xmm0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 18:45:06 +00:00
Evan Cheng
ebf01d63b0 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:33:25 +00:00
Evan Cheng
8ca29326e1 Don't dag combine floating point select to max and min intrinsics. Those 
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31645 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:43:37 +00:00
Evan Cheng
6e56e2c602 Fixed a bug which causes x86 be to incorrectly match 
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31519 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 22:14:24 +00:00
Chris Lattner
3751844b39 remove dead/redundant vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 23:48:56 +00:00
Evan Cheng
acf7f2e3a9 Fix ldmxcsr JIT encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31343 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 06:53:52 +00:00
Evan Cheng
f686d9b71f Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 21:08:32 +00:00
Evan Cheng
009073d839 X86ISD::PEXTRW 3rd operand type is always target pointer type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31185 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-25 21:35:05 +00:00
Evan Cheng
82a9164fb4 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 21:06:01 +00:00
Evan Cheng
f2ea84aadc Don't go too crazy with these AddComplexity. Try matching shufps with load 
folding first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 21:42:15 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Chris Lattner
3a7cd951c1 completely disable folding of loads into scalar sse instructions and provide 
a framework for doing it right.  This fixes
CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll.

Once X86DAGToDAGISel::SelectScalarSSELoad is implemented right, this task
will be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30817 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 21:55:32 +00:00
Chris Lattner
6f98773203 convert packed FP add/sub/mul/div to use a multiclass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30815 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 21:17:13 +00:00
Chris Lattner
941cc4561c one multiclass now defines all 8 variants of binary-scalar-sse-fp operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30814 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 20:55:57 +00:00
Chris Lattner
d2c99d5f7a Switch ADD/MUL/DIV/SUB scalarsse fp ops to a multiclass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 20:35:44 +00:00
Chris Lattner
6970eda7ca Random acts of shrinkage 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30812 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:49:05 +00:00
Chris Lattner
a7ebe556c8 Convert pand/por/pxor to use multiclass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30811 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:37:30 +00:00
Chris Lattner
70f4f2e513 Convert some more instructions over to use a new multiclass. 
Fix a bug where the asmstring for PSUBQrm was wrong.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30810 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:34:33 +00:00
Chris Lattner
5650eeb38e Fix a bug where PADDQrm printed paddd instead of paddq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30809 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:15:46 +00:00
Chris Lattner
7c47f9a7ea Add multiclass for SSE2 instructions that correspond to simple binops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:14:49 +00:00
Chris Lattner
45e123c62a rename: 
PDI_binop_rm -> PDI_binop_rm_int
  PDI_binop_rmi -> PDI_binop_rmi_int

to make it clear that these are for use with intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 19:02:31 +00:00
Chris Lattner
d4060cc989 Convert saturating PADD/PSUB's to use a multiclass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30806 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 18:48:46 +00:00
Chris Lattner
8139e28a79 Convert PAVG*, PMADDWD, and PMUL* to use multiclasses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30805 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 18:39:00 +00:00
Chris Lattner
3dca490ff0 Fix typo in packsswb instr definition, where the load had the wrong type. 
This allows us to use the multiclass for other packs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30804 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 18:23:58 +00:00
Chris Lattner
783d45ef14 handle pmin/pmax with multiclasses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30800 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:49:33 +00:00
Chris Lattner
7733799464 simplify pack and shift intrinsics with multiclasses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:06:17 +00:00
Chris Lattner
01998742c3 Use a multiclass to simplify 'SSE2 Integer comparison' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:47:08 +00:00
Chris Lattner
736c020fc8 move class defns close to uses to make it easier to read 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:33:36 +00:00
Chris Lattner
fb996ee727 simplify horizontal op definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:31:41 +00:00
Chris Lattner
3b57a833a5 remove more unneeded type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:27:03 +00:00
Chris Lattner
aab370db24 remove unneeded definitions and type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30792 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:19:41 +00:00
Chris Lattner
15258d5f9d remove some unneeded type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:17:43 +00:00
Chris Lattner
845fb75536 simplify patterns by merging in operand info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30790 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:50:25 +00:00
Chris Lattner
d1b651d5de Factor operands into packed unary classes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:47:20 +00:00
Chris Lattner
dc5aa21b10 remove dead/duplicate instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30788 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:41:52 +00:00
Chris Lattner
a0ea63db75 Pull operand info up into parent class for scalar sse intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:26:13 +00:00
Chris Lattner
86c1b3a2fd convert the sole sd unary intrinsic to a multiclass for consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30786 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:19:31 +00:00
Chris Lattner
3b8378552e pull operand string into the multiclass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30785 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:13:26 +00:00
Chris Lattner
9498ed8ac9 Remove RSQRTSS[rm] RCPSS[rm], which are dead. 
Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30784 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:09:48 +00:00
Chris Lattner
4cc84edd3b eliminate redundancy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 04:52:09 +00:00
Evan Cheng
485130fbf4 These don't have immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30694 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-03 06:55:11 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Evan Cheng
23b3122c44 JIT encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 05:59:25 +00:00
Evan Cheng
55371739de Can't commute shufps. The high / low parts elements come from different vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:25:40 +00:00
Evan Cheng
206ee9d86c X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-07 08:33:52 +00:00