Commit Graph

16826 Commits

Author SHA1 Message Date
Eric Christopher
06b423452c Remove the CellSPU port.
Approved by Chris Lattner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 22:09:20 +00:00
Jakub Staszak
05ad7eb0c1 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:21:29 +00:00
Jakub Staszak
de7c8530c8 Remove DOS line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:18:34 +00:00
Anton Korobeynikov
2337dd7c86 Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:17:44 +00:00
Patrik Hägglund
1e65676a12 Revert some redundant parts of r142605.
This seems like redundant leftovers from r142288 - exposing
TargetData::parseSpecifier to LLParser - which got reverted. Removes
redunant td != NULL checks in parseSpecifier, and simplifies the
interface to parseSpecifier and init.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 09:04:56 +00:00
Anton Korobeynikov
25efd6d556 Use TARGET2 relocation for TType references on ARM.
Do some cleanup of the code while here.

Inspired by patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:47:00 +00:00
Eric Christopher
242343d1ab Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."
temporarily as it is breaking the gdb bots.

This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 23:30:43 +00:00
Ulrich Weigand
ba6086818d Add (some) PowerPC TLS relocation types to ELF.h and
generate them from PPCELFObjectWriter::getRelocTypeInner
as appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:24:36 +00:00
Shankar Easwaran
206252cc9f Adding changes to support GNU style archive library reading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:38:42 +00:00
Shankar Easwaran
f741482387 Adding convenience function to ELF Header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:26:22 +00:00
Duncan Sands
707276d415 Fix the instcombine GEP index widening transform to work correctly for vector
getelementptrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 13:01:00 +00:00
Duncan Sands
2333e29be4 Relax the restrictions on vector of pointer types, and vector getelementptr.
Previously in a vector of pointers, the pointer couldn't be any pointer type,
it had to be a pointer to an integer or floating point type.  This is a hassle
for dragonegg because the GCC vectorizer happily produces vectors of pointers
where the pointer is a pointer to a struct or whatever.  Vector getelementptr
was restricted to just one index, but now that vectors of pointers can have
any pointer type it is more natural to allow arbitrary vector getelementptrs.
There is however the issue of struct GEPs, where if each lane chose different
struct fields then from that point on each lane will be working down into
unrelated types.  This seems like too much pain for too little gain, so when
you have a vector struct index all the elements are required to be the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 12:59:33 +00:00
Andrew Trick
ad1cc1d1bf misched: Allow subtargets to enable misched and dependent options.
This allows me to begin enabling (or backing out) misched by default
for one subtarget at a time. To run misched we typically want to:
- Disable SelectionDAG scheduling (use the source order scheduler)
- Enable more aggressive coalescing (until we decide to always run the coalescer this way)
- Enable MachineScheduler pass itself.

Disabling PostRA sched may follow for some subtargets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 08:47:29 +00:00
Meador Inge
2920a71663 instcombine: Migrate math library call simplifications
This patch migrates the math library call simplifications from the
simplify-libcalls pass into the instcombine library call simplifier.

I have typically migrated just one simplifier at a time, but the math
simplifiers are interdependent because:

   1. CosOpt, PowOpt, and Exp2Opt all depend on UnaryDoubleFPOpt.
   2. CosOpt, PowOpt, Exp2Opt, and UnaryDoubleFPOpt all depend on
      the option -enable-double-float-shrink.

These two factors made migrating each of these simplifiers individually
more of a pain than it would be worth.  So, I migrated them all together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 04:16:17 +00:00
Evan Cheng
4712b804df Remove virtual keyword for two routines that should never be overridden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167812 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 03:14:16 +00:00
Evan Cheng
310fa65ab9 Revert r167759. Ben is right this isn't likely to help much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 02:56:38 +00:00
Andrew Trick
cf6b6131dd misched: Don't consider artificial edges weak edges.
For now be more conservative in case other out-of-tree schedulers rely
on the old behavior of artificial edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167808 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 02:35:06 +00:00
Bill Wendling
e7ff4c14b1 Use the 'count' attribute instead of the 'upper_bound' attribute.
If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the
same for both of them because we use the 'upper_bound' attribute. Instead use
the 'count' attrbute, which gives the correct number of elements in the array.
<rdar://problem/12566646>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 02:31:47 +00:00
Evan Cheng
0655668b11 Cache size of PassVector to speed up getNumContainedPasses().
getNumContainedPasses() used to compute the size of the vector on demand. It is
called repeated in loops (such as runOnFunction()) and it can be updated while
inside the loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 21:42:53 +00:00
Eric Christopher
d1726a4580 Rewrite DIContext interface to take an object. Update all callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 21:40:38 +00:00
Andrew Trick
a7d2d564d9 misched: rename interfaceto avoid gcc warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 21:28:10 +00:00
Andrew Trick
6996fd0b54 misched: Target-independent support for MacroFusion.
Uses the infrastructure from r167742 to support clustering instructure
that the target processor can "fuse". e.g. cmp+jmp.

Next step: target hook implementations with test cases, and enable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 19:52:20 +00:00
Andrew Trick
9b5caaa9c4 misched: Target-independent support for load/store clustering.
This infrastructure is generally useful for any target that wants to
strongly prefer two instructions to be adjacent after scheduling.

A following checkin will add target-specific hooks with unit
tests. Then this feature will be enabled by default with misched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167742 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 19:40:10 +00:00
Andrew Trick
ae692f2bae misched: Infrastructure for weak DAG edges.
This adds support for weak DAG edges to the general scheduling
infrastructure in preparation for MachineScheduler support for
heuristics based on weak edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 19:28:57 +00:00
Alexey Samsonov
4c0ae9066f Fixup for r167558: Store raw pointer (instead of reference) to RelocMap in DIContext. This is needed to prevent crashes because of dangling reference if the clients don't provide RelocMap to DIContext constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167728 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12 14:25:36 +00:00
Meador Inge
b69bf6be1b Add method for replacing instructions to LibCallSimplifier
In some cases the library call simplifier may need to replace instructions
other than the library call being simplified.  In those cases it may be
necessary for clients of the simplifier to override how the replacements
are actually done.  As such, a new overrideable method for replacing
instructions was added to LibCallSimplifier.

A new subclass of LibCallSimplifier is also defined which overrides
the instruction replacement method.  This is because the instruction
combiner defines its own replacement method which updates the worklist
when instructions are replaced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167681 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-11 03:51:43 +00:00
Meador Inge
939f500202 Add more functions to the target library information.
In the process of migrating optimizations from the simplify-libcalls pass
to the instcombine pass I noticed that a few functions are missing from
the target library information.  These functions need to be available for
querying in the instcombine library call simplifiers.  More functions will
probably be added in the future as more simplifiers are migrated to
instcombine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-10 03:11:06 +00:00
Anton Korobeynikov
12cfa11960 Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.
Based on the patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 20:20:12 +00:00
Chad Rosier
b3235b128f Revert r167620; this can be implemented using an existing CL option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 18:25:27 +00:00
Chad Rosier
d054eda441 Add support for -mstrict-align compiler option for ARM targets.
rdar://12340498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 17:29:38 +00:00
Michael Liao
be02a90de1 Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 07:28:54 +00:00
Eric Christopher
eb3a8c5288 Fix up comment typo and 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 23:38:51 +00:00
Eric Christopher
806e03d238 Add a relocation visitor to lib object. This works via caching relocated
values in a map that can be passed to consumers. Add a testcase that
ensures this works for llvm-dwarfdump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 23:22:07 +00:00
Andrew Trick
3b87f6204f misched: Heuristics based on the machine model.
misched is disabled by default. With -enable-misched, these heuristics
balance the schedule to simultaneously avoid saturating processor
resources, expose ILP, and minimize register pressure. I've been
analyzing the performance of these heuristics on everything in the
llvm test suite in addition to a few other benchmarks. I would like
each heuristic check to be verified by a unit test, but I'm still
trying to figure out the best way to do that. The heuristics are still
in considerable flux, but as they are refined we should be rigorous
about unit testing the improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:09 +00:00
Andrew Trick
881a05b46c misched: handle on-the-fly regpressure queries better for 2-addr
instructions without relying on liveintervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:05 +00:00
Andrew Kaylor
776054dd93 Add interface for object-based JIT events.
This patch adds the interface to expose events from MCJIT when an object is emitted or freed and implements the MCJIT functionality to send those events.  The IntelJITEventListener implementation is left empty for now.  It will be fleshed out in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 18:51:59 +00:00
Andrew Trick
8d4abb2446 misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.

Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 07:10:38 +00:00
Andrew Trick
a78d3228e8 ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 03:13:46 +00:00
Nadav Rotem
887c1fe701 Refactor the getTypeLegalizationCost interface. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 23:57:45 +00:00
Andrew Kaylor
28989889bf Add a method to indicate section address re-assignment is finished.
Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress).  In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved.  To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167400 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 20:57:16 +00:00
Nadav Rotem
e623702c22 Implement the cost of abnormal x86 instruction lowering as a table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 19:32:46 +00:00
Rafael Espindola
08f9c8d776 Add missing this->. Fixes pr14238.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 14:57:21 +00:00
Eli Bendersky
87a1af4380 PR14256: SelectionDAGLowering was renamed to SelectionDAGBuilder a long time ago. Fix references to it in documentation and comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 02:59:23 +00:00
Duncan Sands
2578c123f0 Fix the IntegersSubsetTest unit test when compiled with gcc-4.7. The issue here
is that the unit test doesn't have IntTy equal to APInt, instead it uses a class
derived from APInt.  When, as in these lines, an IntTy& reference is returned
but is assigned to an APInt&, the compiler destroys the temporary the IntTy& was
referring to, leaving the APInt& referring to garbage.  This causes the unittest
to fail systematically on my machine; it can also be caught by running the test
under valgrind.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 14:04:04 +00:00
Nadav Rotem
b4b04c3fa0 X86 CostModel: Add support for a some of the common arithmetic instructions for SSE4, AVX and AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:39:56 +00:00
Nadav Rotem
f149567160 CostModel: add support for Vector Insert and Extract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 22:31:56 +00:00
Nadav Rotem
6bed58ef24 Add a cost model analysis that allows us to estimate the cost of IR-level instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 21:48:17 +00:00
Manman Ren
0a1544d2fd OutputArg: added an index of the original argument to match the change to
InputArg in r165616.

This will enable us to get the actual type for both InputArg and OutputArg.

rdar://9932559


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01 23:49:58 +00:00
Chandler Carruth
174fbec3df Add a getAddressSpace method to the GEP instruction to mirror that of
the inttoptr instruction. The conceptual model here is that
'getAddressSpace' refers to the address space of this instruction's
type. It just happens that for GEPs, that is always the same as the
pointer operand's address space. We want both names so that access
patterns can be consistent between different instruction types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01 11:25:55 +00:00
Chandler Carruth
d988b75c44 Add some consistent doxygen comments for the address space helpers.
These clarify that the methods called 'getPointerAddressSpace' apply to
the pointer *operand* of the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01 11:25:28 +00:00