Commit Graph

11525 Commits

Author SHA1 Message Date
Chris Lattner
87ac972709 Allow globals to have an alignment specified. Switch to using isPowerOf2_32
at Jim's request for the checking code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24210 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 06:46:28 +00:00
Chris Lattner
7d09ab6b88 regenerate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24208 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 06:34:34 +00:00
Chris Lattner
66db8e4aab factor optional alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24207 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 06:34:12 +00:00
Duraid Madina
21687e8f63 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
a bunch of other things) but is currently ignored by the code
generator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 04:29:30 +00:00
Chris Lattner
42ba6b4b88 Write/read allocation instruction alignment info to .bc files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24203 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 22:08:14 +00:00
Chris Lattner
6033716140 verify that alignments are always a power of 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24200 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 21:57:54 +00:00
Chris Lattner
d91c32110a regenerate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24199 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 21:54:23 +00:00
Chris Lattner
ac6e5c10db Verify that alignment amounts are a power of 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24198 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 21:54:03 +00:00
Chris Lattner
9fad0b9974 fix printing the alignment directive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24197 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 21:20:34 +00:00
Nate Begeman
14b0529532 Add support alignment of allocation instructions.
Add support for specifying alignment and size of setjmp jmpbufs.

No targets currently do anything with this information, nor is it presrved
in the bytecode representation.  That's coming up next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24196 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 09:21:28 +00:00
Chris Lattner
ae4664a9f2 add a case Nate sent me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 08:57:56 +00:00
Chris Lattner
3b5f45042b Implement Transforms/TailCallElim/return-undef.ll, a trivial case
that has been sitting in my inbox since May 18. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24194 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 08:21:11 +00:00
Chris Lattner
c812e5d6b8 Turn sdiv into udiv if both operands have a clear sign bit. This occurs
a few times in crafty:

OLD:    %tmp.36 = div int %tmp.35, 8            ; <int> [#uses=1]
NEW:    %tmp.36 = div uint %tmp.35, 8           ; <uint> [#uses=0]
OLD:    %tmp.19 = div int %tmp.18, 8            ; <int> [#uses=1]
NEW:    %tmp.19 = div uint %tmp.18, 8           ; <uint> [#uses=0]
OLD:    %tmp.117 = div int %tmp.116, 8          ; <int> [#uses=1]
NEW:    %tmp.117 = div uint %tmp.116, 8         ; <uint> [#uses=0]
OLD:    %tmp.92 = div int %tmp.91, 8            ; <int> [#uses=1]
NEW:    %tmp.92 = div uint %tmp.91, 8           ; <uint> [#uses=0]

Which all turn into shrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24190 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 07:40:31 +00:00
Chris Lattner
11a49f2c0d Turn srem -> urem when neither input has their sign bit set. This triggers
8 times in vortex, allowing the srems to be turned into shrs:

OLD:    %tmp.104 = rem int %tmp.5.i37, 16               ; <int> [#uses=1]
NEW:    %tmp.104 = rem uint %tmp.5.i37, 16              ; <uint> [#uses=0]
OLD:    %tmp.98 = rem int %tmp.5.i24, 16                ; <int> [#uses=1]
NEW:    %tmp.98 = rem uint %tmp.5.i24, 16               ; <uint> [#uses=0]
OLD:    %tmp.91 = rem int %tmp.5.i19, 8         ; <int> [#uses=1]
NEW:    %tmp.91 = rem uint %tmp.5.i19, 8                ; <uint> [#uses=0]
OLD:    %tmp.88 = rem int %tmp.5.i14, 8         ; <int> [#uses=1]
NEW:    %tmp.88 = rem uint %tmp.5.i14, 8                ; <uint> [#uses=0]
OLD:    %tmp.85 = rem int %tmp.5.i9, 1024               ; <int> [#uses=2]
NEW:    %tmp.85 = rem uint %tmp.5.i9, 1024              ; <uint> [#uses=0]
OLD:    %tmp.82 = rem int %tmp.5.i, 512         ; <int> [#uses=2]
NEW:    %tmp.82 = rem uint %tmp.5.i1, 512               ; <uint> [#uses=0]
OLD:    %tmp.48.i = rem int %tmp.5.i.i161, 4            ; <int> [#uses=1]
NEW:    %tmp.48.i = rem uint %tmp.5.i.i161, 4           ; <uint> [#uses=0]
OLD:    %tmp.20.i2 = rem int %tmp.5.i.i, 4              ; <int> [#uses=1]
NEW:    %tmp.20.i2 = rem uint %tmp.5.i.i, 4             ; <uint> [#uses=0]

it also occurs 9 times in gcc, but with odd constant divisors (1009 and 61)
so the payoff isn't as great.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24189 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 07:28:37 +00:00
Jim Laskey
a5e5bff8b8 Fix logic bug in finding retry slot in tally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24188 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 00:01:25 +00:00
Jim Laskey
54f997d23f Fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24187 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 18:26:02 +00:00
Duraid Madina
764fe71e12 oops, forgot to load GP for indirect calls, though the old code now commented
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24186 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 17:55:53 +00:00
Duraid Madina
b97cc99058 kill redundant SP/GP/RP save/restores across calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 10:01:10 +00:00
Duraid Madina
9f7290633a add support for loading bools
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 09:59:06 +00:00
Jim Laskey
7d090f3485 Scheduling now uses itinerary data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24180 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 04:05:35 +00:00
Duraid Madina
49fcc4006c fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24175 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 00:57:56 +00:00
Duraid Madina
0e5e0d14a8 add pattern to load constant 0 into a predicate reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 10:09:32 +00:00
Chris Lattner
61bc60fc4f Fix a bug that prevented this pattern from matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 05:45:34 +00:00
Nate Begeman
5dc7e861f8 Fix a crash that Andrew noticed, and add a pair of braces to unfconfuse
XCode's indenting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24159 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 18:42:59 +00:00
Andrew Lenharth
7bbff04f7f make this 64 bit clean, fixed test30 of /Regression/Transforms/InstCombine/add.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24158 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 18:35:40 +00:00
Chris Lattner
bad13eb189 Fix a QOI issue noticed by Markus F.X.J. Oberhumer.
This fixes PR641


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24154 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 17:42:58 +00:00
Duraid Madina
056728f192 "fix" support for FP constants (this code asserts in the scheduler,
though)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24152 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:32:59 +00:00
Duraid Madina
a2df2aee81 add F0 and F1 to the FP register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24151 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:30:39 +00:00
Chris Lattner
cb2583e17d This works now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 06:49:37 +00:00
Duraid Madina
5966955445 add support for SELECT to TargetSelectionDAG.td, add support for
selecting ints to IA64, and a few other ia64 bits and pieces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:37:18 +00:00
Duraid Madina
93856802ae add support for loading FP constants +0.0 and +1.0 to the dag isel,
stop pretending -0.0 and -1.0 are machine constants


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:35:04 +00:00
Chris Lattner
7c22575e32 Fix a source of undefined behavior when dealing with 64-bit types. This
may fix PR652.  Thanks to Andrew for tracking down the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24145 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 01:47:04 +00:00
Jim Laskey
6cee630070 Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 20:06:59 +00:00
Duraid Madina
7a8ef3a0d4 heh, scheduling was easy?
need to send chris, jim and sampo a box of fish each


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24135 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:49:08 +00:00
Duraid Madina
dc9549b52c FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
one sometimes needs to pass FP args in both FP *and* integer registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24134 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:46:16 +00:00
Duraid Madina
aba8457125 so tablegen was thinking I might want to convert FPs to predicates.
clever little tablegen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:32:15 +00:00
Duraid Madina
e2fd9e2d9d add support for int->FP and FP->int ops, and add ia64 patterns for these
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:07:25 +00:00
Duraid Madina
d1eda6d155 add zeroextend predicate->integer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 01:29:55 +00:00
Chris Lattner
5b0ac99c96 Add a flag to enable a darwin linker optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 00:12:36 +00:00
Chris Lattner
bb69e39b5b Make constant pool entries use private labels. This is important when you're
not compiling a whole program at a time :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 22:12:06 +00:00
Chris Lattner
306f6fefc9 Fix an iterator invalidation problem in code used by the -strip pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24124 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 18:42:37 +00:00
Chris Lattner
76ff2c7504 Limit the search depth of MaskedValueIsZero to 6 instructions, to avoid
bad cases.  This fixes Markus's second testcase in PR639, and should
seal it for good.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24123 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 18:35:52 +00:00
Jim Laskey
5a608ddada 1. Embed and not inherit vector for NodeGroup.
2. Iterate operands and not uses (performance.)

3. Some long pending comment changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24119 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 12:49:09 +00:00
Duraid Madina
363aff2f3c add FP compares and implicit register defs to the dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24118 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 01:42:11 +00:00
Chris Lattner
bf209489ad Significantly simplify this code and make it more aggressive. Instead of having
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg.  This helps us compile code like this:

%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
        %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
        %tmp = load ubyte* %tmp1                ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp to int          ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        lbz r3, 108(r3)
        blr

instead of:

_test:
        lbz r2, 108(r3)
        or r3, r2, r2
        blr

The (dead) copy emitted to copy r3 into a vreg for extra-block uses was
increasing the live range of r3 past the load, preventing the coallescing.

This implements CodeGen/PowerPC/reg-coallesce-simple.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24115 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 19:42:35 +00:00
Chris Lattner
a4176525cc Reduce the number of copies emitted as machine instructions by
generating results in vregs that will need them.  In the case of something
like this:  CopyToReg((add X, Y), reg1024), we no longer emit code like
this:

   reg1025 = add X, Y
   reg1024 = reg 1025

Instead, we emit:

   reg1024 = add X, Y

Whoa! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24111 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 18:54:27 +00:00
Chris Lattner
c1d6f67e8e If the module has no t-t and the host is an alpha, default to using the Alpha BE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24110 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 16:44:01 +00:00
Duraid Madina
5c2c64e567 fix some broken comparisons, this affected the Pattern isel too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24109 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 10:14:19 +00:00
Chris Lattner
b685af3e60 This is implemented
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24107 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 06:42:12 +00:00
Chris Lattner
3e6099b05f Codegen mul by negative power of two with a shift and negate.
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:

_foo:
        slwi r2, r3, 1
        subfic r3, r2, 63
        blr

instead of:

_foo:
        mulli r2, r3, -2
        addi r3, r2, 63
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24106 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 06:41:49 +00:00