Commit Graph

79250 Commits

Author SHA1 Message Date
Matthias Braun
2d6f83dac9 RegisterCoalescer: hide terminal rule option by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 23:55:11 +00:00
Rafael Espindola
5acccb16a8 Map directly from signature symbol to group index. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236058 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:59:58 +00:00
Eric Christopher
f506831ede Reuse a lookup in an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236054 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:38:35 +00:00
Rafael Espindola
b89275550c Remove redundant temporary std::vector.
New sections are added to the end of the list, so the RelSections array was
redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:26:19 +00:00
Tim Northover
9f7d13868a ARM: fix peephole optimisation of TST
We were trying to look through COPY instructions, but only to the next
instruction in a BB and incorrectly anyway. The cases where that would actually
be a good idea are rare enough (and not even tested!) that it's not worth
trying to get right.

rdar://20721342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236050 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:03:55 +00:00
Rafael Espindola
f75160b8d9 Avoid one more walk over all sections. NFC.
Set the group section index as they are created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:03:22 +00:00
Andrew Kaylor
63ca5d6589 Style updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:01:51 +00:00
Rafael Espindola
7aff72189a Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:58:05 +00:00
Andrew Kaylor
0595a97817 [WinEH] Split blocks at calls to llvm.eh.begincatch
Differential Revision: http://reviews.llvm.org/D9311



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:54:14 +00:00
Rafael Espindola
f23613a3cd Avoid an extra walk over the sections just to assign sections to groups.
Assign the sections in the same pass we compute the index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:52:33 +00:00
James Y Knight
642098ac59 Sparc: Add alternate aliases for conditional branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:27:31 +00:00
Rafael Espindola
923bffd675 Remove the GroupMapTy DenseMap. NFC.
Instead use the Group symbol of MCSectionELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:07:28 +00:00
Sanjay Patel
959b276771 transform fadd chains to increase parallelism
This is a compromise: with this simple patch, we should always handle a chain of exactly 3
operations optimally, but we're not generating the optimal balanced binary tree for a longer
sequence.

In general, this transform will reduce the dependency chain for a sequence of instructions
using N operands from a worst case N-1 dependent operations to N/2 dependent operations. 
The optimal balanced binary tree would reduce the chain to log2(N).

The trade-off for not dealing with longer sequences is: (1) we have less complexity in the
compiler, (2) we avoid unknown compile-time blowup calculating a balanced tree, and (3) we
don't need to worry about the increased register pressure required to parallelize longer
sequences. It also seems unlikely that we would ever encounter really long strings of
dependent ops like that in the wild, but I'm not sure how to verify that speculation.
FWIW, I see no perf difference for test-suite running on btver2 (x86-64) with -ffast-math
and this patch.

We can extend this patch to cover other associative operations such as fmul, fmax, fmin, 
integer add, integer mul.

This is a partial fix for:
https://llvm.org/bugs/show_bug.cgi?id=17305

and if extended:
https://llvm.org/bugs/show_bug.cgi?id=21768
https://llvm.org/bugs/show_bug.cgi?id=23116

The issue also came up in:
http://reviews.llvm.org/D8941

Differential Revision: http://reviews.llvm.org/D9232



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:03:22 +00:00
Alexei Starovoitov
04877fa7ff [bpf] fix build
Patch by Brenden Blanco.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:38:56 +00:00
Rafael Espindola
032f234969 Use range loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:23:35 +00:00
Filipe Cabecinhas
7acbf56112 Relax an assert when there's a type mismatch in forward references
Summary:
We don't seem to need to assert here, since this function's callers expect
to get a nullptr on error. This way we don't assert on user input.

Bug found with AFL fuzz.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9308

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:18:47 +00:00
Rafael Espindola
5052130d6a Avoid adding to SectionIndexMap sections that we never lookup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236026 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:09:13 +00:00
Daniel Berlin
b1e1aa04ed Make getModRefInfo(Instruction *) not crash on certain types of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 19:19:14 +00:00
Rafael Espindola
3813ef6886 Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 19:07:16 +00:00
Sanjay Patel
f060668270 [x86] remove RCPPS and RSQRTPS intrinsic instruction definitions
We don't need codegen-only intrinsic instructions for the vector forms of these instructions.

This makes the reciprocal estimate instruction lowering identical to how we handle normal
square roots: (V)SQRTPS / (V)SQRTPD.

No existing regression tests fail with this patch.

Differential Revision: http://reviews.llvm.org/D9301



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:48:45 +00:00
Eric Christopher
5d88757074 Add a fixme to resetTargetOptions to explain why it needs to go
away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236009 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:09:05 +00:00
Eric Christopher
a4944e5188 Fix a [-Werror,-Winconsistent-missing-override] problem in the
NVPTX overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236007 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:06:27 +00:00
Tom Stellard
53fec21fbe R600: Fix up for AsmPrinter's OutStreamer being a unique_ptr
Fixes a crash with basically any OpenGL application using the radeonsi
driver.

Patch by: Michel Dänzer

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90176
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:37:03 +00:00
Tom Stellard
1630fbeb91 R600/SI: Add a lower case alias for subtarget feature: +DumpCode
llc converts all feature strings to lower case, while the LLVM C API
does not, so we need a lower case alias in order to test this with llc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:37:00 +00:00
Justin Holewinski
0292a66bb1 [NVPTX] Handle addrspacecast constant expressions in aggregate initializers
We need to track if an AddrSpaceCast expression was seen when
generating an MCExpr for a ConstantExpr.  This change introduces a
custom lowerConstant method to the NVPTX asm printer that will create
NVPTXGenericMCSymbolRefExpr nodes at the appropriate places to encode
the information that a given symbol needs to be casted to a generic
address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236000 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:18:30 +00:00
David Blaikie
e48ac32ea2 [opaque pointer type] Encode the allocated type of an alloca rather than its pointer result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 16:51:01 +00:00
Sanjay Patel
2a7841dd4d move IR-level optimization flags into their own struct
This is a preliminary step to using the IR-level floating-point fast-math-flags in the SDAG (D8900).

In this patch, we introduce the optimization flags as their own struct. As noted in the TODO comment, 
we should eventually share this data between the IR passes and the backend.

We also switch the existing nsw / nuw / exact bit functionality of the BinaryWithFlagsSDNode class to
use the new struct.

The tradeoff is that instead of using the free but limited space of SDNode's SubclassData, we add a
data member to the subclass. This means we don't have to repeat all of the get/set methods per flag,
but we're potentially adding size to all nodes of this subclassi type.

In practice on 64-bit systems (measured on Linux and MacOS X), there is no size difference between an
SDNode and BinaryWithFlagsSDNode after this change: they're both 80 bytes. This means that we had at
least one free byte to play with due to struct alignment.

Differential Revision: http://reviews.llvm.org/D9325



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235997 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 16:39:12 +00:00
Rafael Espindola
a34b8b2e55 Use a std::vector to record the offsets of the sections. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235995 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 15:26:21 +00:00
Rafael Espindola
39dfabd785 Avoid an extra loop for computing the section size. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235994 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 15:04:09 +00:00
Elena Demikhovsky
83259d70bb Fixed crash of variable shift inst on AVX2
https://llvm.org/bugs/show_bug.cgi?id=22955



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235993 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:46:35 +00:00
Toma Tabacu
8bec0f9db1 [mips] [IAS] Do not generate redundant ORi in createLShiftOri.
Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:06:35 +00:00
Sergey Dmitrouk
1f7a90d793 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:05:47 +00:00
Rafael Espindola
9924357175 Use CIE version 4 for dwarf4.
According to http://www.dwarfstd.org/doc/DWARF4.pdf appendix F the CIE
version for dwarf 4 is 4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:55:31 +00:00
Daniel Jasper
515cc265c9 Revert "[DebugInfo] Add debug locations to constant SD nodes"
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:38:35 +00:00
Toma Tabacu
f9fc545757 [mips] [IAS] Rename the createShiftOr function to createLShiftOri. NFC.
Summary: The new name is more accurate with regard to the functionality.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:16:06 +00:00
Toma Tabacu
c3adf30a03 [mips] [IAS] Store the expandLoadImm destination register in a variable. NFC.
Summary: This removes multiple calls to getReg() and saves us column space in the source file.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 12:04:53 +00:00
Sergey Dmitrouk
716c5d8a30 [DebugInfo] Add debug locations to constant SD nodes
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 11:56:37 +00:00
Elena Demikhovsky
44a0c9071a AVX-512: Added "pandn" intrinsics set
by Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235971 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 08:12:42 +00:00
Elena Demikhovsky
8dfda019a0 Masked gather and scatter: Added code for SelectionDAG.
All other patches, including tests will follow.

http://reviews.llvm.org/D7665



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 07:57:37 +00:00
David Blaikie
974d5d32c8 [opaque pointer type] Encode the pointee type in the bitcode for 'cmpxchg'
As a space optimization, this instruction would just encode the pointer
type of the first operand and use the knowledge that the second and
third operands would be of the pointee type of the first. When typed
pointers go away, this assumption will no longer be available - so
encode the type of the second operand explicitly and rely on that for
the third.

Test case added to demonstrate the backwards compatibility concern,
which only comes up when the definition of the second operand comes
after the use (hence the weird basic block sequence) - at which point
the type needs to be explicitly encoded in the bitcode and the record
length changes to accommodate this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235966 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 04:30:29 +00:00
Ahmed Bougacha
e1f835ab59 [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.
This matches other assemblers and is less unexpected (e.g. PR23227).
On ELF, I tried binutils gas v2.24 and nasm 2.10.09, and they both
agree on LShr.  On COFF, I couldn't get my hands on an assembler yet,
so don't change the behavior.  For now, don't change it on non-AArch64
Darwin either, as the other assembler is gas v1.38, which does an AShr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235963 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 01:37:11 +00:00
Duncan P. N. Exon Smith
fef483667f DebugInfo: Support up to 2^16 arguments in a subprogram
Support up to 2^16 arguments to a function.  If we do hit the limit,
assert out rather than restarting at 0 as we've done historically.

This fixes PR23332.  A clang test will follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235955 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 01:07:33 +00:00
Matthias Braun
0dff695ba9 Cleanup, remove unused return value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:37:05 +00:00
Ahmed Bougacha
dac39b1fef [MC] Split MCBinaryExpr::Shr into LShr and AShr.
Defaulting to AShr without consulting the target MCAsmInfo isn't OK.
Add a flag to fix that.  Keep it off for now: target migrations will
follow in separate commits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235951 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:21:32 +00:00
Ahmed Bougacha
07bcfe929e [MC] Move getBinOpPrecedence into AsmParser. NFC.
In preparation for a future patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235950 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:17:39 +00:00
Hans Wennborg
5d004276ec Switch lowering: use uint32_t for weights everywhere
I previously thought switch clusters would need to use uint64_t in case
the weights of multiple cases overflowed a 32-bit int. It turns
out that the weights on a terminator instruction are capped to allow for
being added together, so using a uint32_t should be safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235945 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 23:52:19 +00:00
Duncan P. N. Exon Smith
0b29dea9f1 LTO: Add API to choose whether to embed uselists
Reverse libLTO's default behaviour for preserving use-list order in
bitcode, and add API for controlling it.  The default setting is now
`false` (don't preserve them), which is consistent with `clang`'s
default behaviour.

Users of libLTO should call `lto_codegen_should_embed_uselists(CG,true)`
prior to calling `lto_codegen_write_merged_modules()` whenever the
output file isn't part of the production workflow in order to reproduce
results with subsequent calls to `llc`.

(I haven't added tests since `llvm-lto` (the test tool for LTO) doesn't
support bitcode output, and even if it did: there isn't actually a good
way to test whether a tool has passed the flag.  If the order is already
"natural" (if the order will already round-trip) then no use-list
directives are emitted at all.  At some point I'll circle back to add
tests to `llvm-as` (etc.) that they actually respect the flag, at which
point I can somehow add a test here as well.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235943 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 23:38:54 +00:00
Hans Wennborg
b176a4f2e4 Switch lowering: Take branch weight into account when ordering for fall-through
Previously, the code would try to put a fall-through case last,
even if that meant moving a case with much higher branch weight
further down the chain.

Ordering by branch weight is most important, putting a fall-through
block last is secondary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 23:35:22 +00:00
Duncan P. N. Exon Smith
ae51ba7ea1 LTO: Simplify code generator initialization
Simplify `LTOCodeGenerator` initialization by initializing simple fields
at their definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235939 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 23:19:26 +00:00
Sanjay Patel
fd55d49f65 remove obsolete pattern matches for scalar SSE ops
The blendi pattern should always replace the insertps pattern after:
http://reviews.llvm.org/rL232850
http://reviews.llvm.org/rL235124



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 22:23:17 +00:00
Rafael Espindola
b8def5a8d1 Use CIE version 1 for .eh_frame.
According to

http://www.linuxbase.org/betaspecs/lsb/LSB-Core-generic/LSB-Core-generic/ehframechpt.html

we should always use 1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 22:04:24 +00:00
Ahmed Bougacha
ae618e7873 [AArch64] Also combine vector selects fed by non-i1 SETCCs.
After legalization, scalar SETCC has an i32 result type on AArch64.
The i1 requirement seems too conservative, replace it with an assert.

This also means that we now can run after legalization. That should also
be fine, since the ops legalizer runs again after each combine, and
all types created all have the same sizes as the (legal) inputs.

Exposed by r235917; while there, robustize its tests (bsl also uses the
register it defines).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235922 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 21:43:12 +00:00
Pete Cooper
8f16251a7a Add missing library dependency in libPDB.
PDB uses COFFObjectFile::getPE32Header which lives in libObject.

Make sure that LLVMBuild.txt reflects this dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235920 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 21:23:12 +00:00
Ahmed Bougacha
bc92b2ca37 [AArch64] Don't assert when combining (v3f32 select (setcc f64)).
When the setcc has f64 operands, we can't build a vector setcc mask
to feed a vselect, because f64 doesn't divide v3f32 evenly.
Just bail out when that happens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235917 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 21:01:20 +00:00
Chris Bieneman
dbaf039dde Fixes a hang that can occur if a signal comes in during malloc calls.
We need to dereference the signals mutex during handler registration so that we force its construction. This is to prevent the first use being during handling an actual signal because you can't safely allocate memory in a signal handler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235914 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 20:45:35 +00:00
Bill Schmidt
445b1c78a5 Silence unused variable errors for no-asserts builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235913 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 20:22:35 +00:00
Hans Wennborg
84145dcd08 Switch lowering: order bit tests by branch weight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235912 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 20:21:17 +00:00
David Blaikie
d455682f39 [opaque pointer type] encode the pointee type of global variables
Use a few extra bits in the const field (after widening it from a fixed
single bit) to stash the address space which is no longer provided by
the type (and an extra bit in there to specify that we're using that new
encoding).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 19:58:56 +00:00
Bill Schmidt
dcc4f724cc [PPC64LE] Remove unnecessary swaps from lane-insensitive vector computations
This patch adds a new SSA MI pass that runs on little-endian PPC64
code with VSX enabled. Loads and stores of 4x32 and 2x64 vectors
without alignment constraints are accomplished for little-endian using
lxvd2x/xxswapd and xxswapd/stxvd2x. The existence of the additional
xxswapd instructions hurts performance in comparison with big-endian
code, but they are necessary in the general case to support correct
semantics.

However, the general case does not apply to most vector code. Many
vector instructions are lane-insensitive; they do not "care" which
lanes the parallel computations are performed within, provided that
the resulting data is stored into the correct locations. Thus this
pass looks for computations that perform only lane-insensitive
operations, and remove the unnecessary swaps from loads and stores in
such computations.

Future improvements will allow computations using certain
lane-sensitive operations to also be optimized in this manner, by
modifying the lane-sensitive operations to account for the permuted
order of the lanes. However, this patch only adds the infrastructure
to permit this; no lane-sensitive operations are optimized at this
time.

This code is heavily exercised by the various vectorizing applications
in the projects/test-suite tree. For the time being, I have only added
one simple test case to demonstrate what the pass is doing. Although
it is quite simple, it provides coverage for much of the code,
including the special case handling of copies and subreg-to-reg
operations feeding the swaps. I plan to add additional tests in the
future as I fill in more of the "special handling" code.

Two existing tests were affected, because they expected the swaps to
be present, but they are now removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235910 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 19:57:34 +00:00
Sanjay Patel
95619d83af fix 80-cols; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 17:45:44 +00:00
Zachary Turner
eebbed25a7 Fix build broken by incorrect class name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 17:22:30 +00:00
Zachary Turner
7b8e8e5dc0 Make llvm-symbolizer work on Windows.
Differential Revision: http://reviews.llvm.org/D9234
Reviewed By: Alexey Samsonov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235900 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 17:19:51 +00:00
Zachary Turner
d8caa1c4ca Make an RAII com initializer.
Differential Revision: http://reviews.llvm.org/D9267
Reviewed By: Aaron Ballman, David Majnemer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 17:19:26 +00:00
Sanjay Patel
4e9cdece79 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 17:03:31 +00:00
Toma Tabacu
b363a5846d [mips] Correct bytes to bits in 2 comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 15:21:38 +00:00
Elena Demikhovsky
f8ae1af2e1 AVX-512: added calling conventions for i1 vectors.
Fixed bug: https://llvm.org/bugs/show_bug.cgi?id=20724



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235889 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 15:11:19 +00:00
Brendon Cahoon
2afd045e03 [Hexagon] Use constant extenders to fix up hardware loops
Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.

Differential Revision: http://reviews.llvm.org/D9262


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 14:16:43 +00:00
Toma Tabacu
af3ec2cfd4 [mips] [IAS] Improve warning for using AT with .set noat.
Summary:
Changed the warning message to show the current value of $at, similar to what clang does for typedef's, and renamed warnIfAssemblerTemporary to a more descriptive name.

I also changed the type of variables which store registers from int to unsigned, updated the relevant test and tried to make the related comments clearer.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8479

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 14:05:04 +00:00
Vasileios Kalintiris
659d53e897 Reapply "[mips][FastISel] Implement shift ops for Mips fast-isel.""
This reapplies r235194, which was reverted in r235495 because it was causing a
failure in our out-of-tree buildbots for MIPS. With the sign-extension patch
in r235718, this patch doesn't cause any problem any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 13:28:05 +00:00
Toma Tabacu
23c4ea3fda [mips] [IAS] Rename getATRegNum and setATReg to {g,s}etATRegIndex. NFC.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8480

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 13:12:59 +00:00
Elena Demikhovsky
17bbdd05dd AVX-512: Extend/Truncate operations for SKX,
SETCC for bit-vectors



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 12:57:59 +00:00
Toma Tabacu
0b5a15b779 [MC] [IAS] Add support for the \@ .macro pseudo-variable.
Summary:
When used, it is substituted with the number of .macro instantiations we've done up to that point in time.
So if this is the 1st time we've instantiated a .macro (any .macro, regardless of name), \@ will instantiate to 0, if it's the 2nd .macro instantiation, it will instantiate to 1 etc.

It can only be used inside a .macro definition, an .irp definition or an .irpc definition (those last 2 uses are undocumented).

Reviewers: echristo, rafael

Reviewed By: rafael

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D9197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235862 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 10:50:29 +00:00
Pawel Bylica
59764b94a7 Constfold insertelement to undef when index is out-of-bounds
Summary:
This patch adds constant folding of insertelement instruction to undef value when index operand is constant and is not less than vector size or is undef.

InstCombine does not support this case, but I'm happy to add it there also if this change is accepted.

Test Plan: Unittests and regression tests for ConstProp pass.

Reviewers: majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 09:30:49 +00:00
Simon Pilgrim
6df35e7844 [X86][SSE] Add v16i8/v32i8 multiplication support
Patch to allow int8 vectors to be multiplied on the SSE unit instead of being scalarized.

The patch sign extends the i8 lanes to i16, uses the SSE2 pmullw multiplication instruction, then packs the lower byte from each result.

Differential Revision: http://reviews.llvm.org/D9115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 07:55:46 +00:00
Philip Reames
c4ab95d900 Make the message associated with a fatal error slightly more helpful
Looking into 23095, my best guess is that the CodeGen library itself isn't getting linked and initialized properly.  To make this slightly more obvious to consumers of LLVM, emit a different error message if we can tell that the registry is empty vs you've simply happened to name a collector which hasn't been registered.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-26 22:00:34 +00:00
Philip Reames
a404b6f421 [RewriteStatepointsForGC] Exclude constant values from being considered live at a safepoint
There can be various constant pointers in the IR which do not get relocated at a safepoint. One example is the address of a global variable. Another example is a pointer created via inttoptr. Note that the optimizer itself likes to create such inttoptrs when locally propagating constants through dynamically dead code.

To deal with this, we need to exclude uses of constants from contributing to the liveness of a safepoint which might reach that use. At some later date, it might be worth exploring what could be done to support the relocation of various special types of "constants", but that's future work.

Differential Revision: http://reviews.llvm.org/D9236



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235821 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-26 19:48:03 +00:00
Philip Reames
83a049f2a6 Don't Place Entry Safepoints Before the llvm.frameescape() Intrinsic
llvm.frameescape() intrinsic is not a real call. The intrinsic can only exist in the entry block. Inserting a gc.statepoint() before llvm.frameescape() may split the entry block, and push the intrinsic out of the entry block.

Patch by: Swaroop.Sridhar@microsoft.com
Differential Revision: http://reviews.llvm.org/D8910




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-26 19:41:23 +00:00
Alexei Starovoitov
ad82d26669 [bpf] fix build and remove a compiler warning in Release mode
Patch by Brenden Blanco.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-26 01:58:08 +00:00
Sanjay Patel
1111a216ee [x86] instcombine more cases of insertps into a shufflevector
This is a follow-on to D8833 (insertps optimization when the zero mask is not used).

In this patch, we check for the case where the zmask is used, but both input vectors
to the insertps intrinsic are the same operand or the zmask overrides the destination
lane. This lets us replace the 2nd shuffle input operand with the zero vector.

Differential Revision: http://reviews.llvm.org/D9257



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235810 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-25 20:55:25 +00:00
Benjamin Kramer
b6ee10d9e5 [ARM] Simplify code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-25 17:25:13 +00:00
Benjamin Kramer
4b86b0db83 [hexagon] Use range-based for loops. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-25 14:46:53 +00:00
Benjamin Kramer
79408c7dc8 [hexagon] Remove setHexLibcallName, it leaks memory.
Just spell out the full names, it's not that much more code.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-25 14:46:46 +00:00
Andrew Kaylor
87dc11bb4c Fix build error from accidental change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 23:34:46 +00:00
Andrew Kaylor
e0905685aa [WinEH] Find correct cloned entry block for outlined handler functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 23:27:32 +00:00
Andrew Kaylor
7d3dd38582 [WinEH] Find correct cloned entry block for outlined handler functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235789 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 23:10:38 +00:00
Nico Weber
9418133055 Assert that Process::FindInEnvPath() is passed a relative path.
It misbehaves with absolute paths. (So does path::append().)
Goes with clang r235787.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 22:18:46 +00:00
Duncan P. N. Exon Smith
8efc190690 Linker: Copy over function metadata attachments
Update `lib/Linker` to handle `Function` metadata attachments.  The
attachments stick with the function body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 22:07:31 +00:00
Duncan P. N. Exon Smith
ae3211466a IR: Add assembly/bitcode support for function metadata attachments
Add serialization support for function metadata attachments (added in
r235783).  The syntax is:

    define @foo() !attach !0 {

Metadata attachments are only allowed on functions with bodies.  Since
they come before the `{`, they're not really part of the body; since
they require a body, they're not really part of the header.  In
`LLParser` I gave them a separate function called from `ParseDefine()`,
`ParseOptionalFunctionMetadata()`.

In bitcode, I'm using the same `METADATA_ATTACHMENT` record used by
instructions.  Instruction metadata attachments are included in a
special "attachment" block at the end of a `Function`.  The attachment
records are laid out like this:

    InstID (KindID MetadataID)+

Note that these records always have an odd number of fields.  The new
code takes advantage of this to recognize function attachments (which
don't need an instruction ID):

    (KindID MetadataID)+

This means we can use the same attachment block already used for
instructions.

This is part of PR23340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 22:04:41 +00:00
Duncan P. N. Exon Smith
ef477f3580 Verifier: Function metadata attachments require a body
Add a verifier check that only functions with bodies have metadata
attachments.  This should help catch bugs in frontends and
transformation passes.  Part of PR23340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235784 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:53:27 +00:00
Duncan P. N. Exon Smith
eb79bb6e61 IR: Add Function metadata attachments
Add IR support for `Metadata` attachments.  Assembly and bitcode support
will follow shortly, but for now we just have unit tests.  This is part
of PR23340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:51:02 +00:00
Duncan P. N. Exon Smith
233c2e7216 LLParser: Simplify ParseInstructionMetadata(), NFC
Remove unused `PFS` variable and take the `Instruction` by reference.
(Not really related to PR23340, but might as well clean this up while
I'm here.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235782 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:29:36 +00:00
Quentin Colombet
1615d1720e [DAGCombiner] Fix the type used in canFoldInAddressingMode to account for the
right scaling.

In the function canFoldInAddressingMode, VT is computed as the type of the
destination/source of a LOAD/STORE operations, instead of the memory type of the
operation.
On targets with a scaling factor on the offset of the LOAD/STORE operations, the
function may return false for actually valid cases. This may then prevent the
selection of profitable pre or post indexed load/store operations, and instead
select pre or post indexed load/store for unprofitable cases.

Patch by Francois de Ferriere <francois.de-ferriere@st.com>!

Differential Revision: http://reviews.llvm.org/D9146


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:28:00 +00:00
Duncan P. N. Exon Smith
eb713786cd LLParser: Split out ParseMetadataAttachment(), NFC
Make the code reusable for `Function` metadata attachments (PR23340).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:21:57 +00:00
David Blaikie
2bf0f6fdab [opaque pointer type] Verifier/AutoUpgrade: Remove a few uses of PointerType::getElementType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:16:07 +00:00
Duncan P. N. Exon Smith
3be414736a AsmWriter: Parameterize the syntactic separator for attachments
Parameterize the separator for attachments, since `Function` metadata
attachments (PR23340) aren't going to use a `,` (comma).  No real
functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:06:21 +00:00
Duncan P. N. Exon Smith
c8be244db7 AsmWriter: Only collect attachment names once per module
Collect metadata names once per `AssemblyWriter` instead of every time
we need to print some attachments.  Just a drive-by; this caught my eye
while I was refactoring the code in r235772.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:03:05 +00:00
Kaelyn Takata
5f10af2b53 Remove an unused variable to prevent -Werror build failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 21:02:18 +00:00
Duncan P. N. Exon Smith
61317d57df AsmWriter: Split out code for printing Metadata attachments, NFC
Refactor the code for printing `Instruction` metadata attachments so it
can be reused for `Function`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 20:59:52 +00:00
Hans Wennborg
7a301c1b8c SimplifyCFG: Correctly handle switch lookup tables which fully cover the input type and use bit tests to check for holes
When using bit tests for hole checks, we call AddPredecessorToBlock to give the
phi node a value from the bit test block. This would break if we've
previously called removePredecessor on the default destination because the
switch is fully covered.

Test case by Mark Lacey.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235771 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 20:57:56 +00:00
Duncan P. N. Exon Smith
af8df399e1 IR: Use a bitmask to access GlobalObject subclass data
Make room for more than just `Function::isMaterializable()` in the
`GlobalObject` subclass data bitfield.  Since we're treating it like a
bitfield, change `Function::Function()` to zero-out the whole thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235770 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 20:47:23 +00:00