Commit Graph

74589 Commits

Author SHA1 Message Date
Evan Cheng
8ead80db20 Set endianess and pointer size for PPC Linux. Bug noticed by Roman Divacky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 19:43:05 +00:00
Jakub Staszak
b137f16936 Change SmallVector to SmallPtrSet in BranchProbabilityInfo. Handle cases where
one than one successor goes to the same block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136638 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 19:16:26 +00:00
Owen Anderson
7f76baed5e Enhance the fixed length disassembler to better handle operand decoding failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 18:44:37 +00:00
Owen Anderson
423b81e692 Add a clear() operation to MCInst, to drop all of its operands. Useful for the disassembler, where we may realize fairly late into decoding that something is wrong and need to reset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 18:43:18 +00:00
Richard Osborne
965b891762 Fix crash with varargs function with no named parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 16:45:59 +00:00
Douglas Gregor
32ab312e3f Update CMake target names for tablegen-generated data in the X86 and ARM targets. This should fix the CMake build with MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 16:29:27 +00:00
Jakub Staszak
e2481ff8ee Add BlockFrequency::getEntryFrequency()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 15:22:10 +00:00
Jay Foad
5cd8ea2fd3 Add braces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136612 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 12:48:54 +00:00
Jay Foad
8d948652f2 Simplify printAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 12:29:14 +00:00
Jay Foad
4255274cf8 Micro-optimisation in getAliasedGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136610 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 12:28:01 +00:00
Jay Foad
b899d95933 Remove an unnecessary cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 12:27:15 +00:00
Jay Foad
4f2d6950fb The operands of a GlobalAlias are always Constants. Simplify things
accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 12:20:36 +00:00
Chandler Carruth
8733409448 I mis-interpreted the MCDisassembler's intended dependencies. Now to fix
them properly. Specifically, the disassembler clearly attempts to
initialiaze all TargetInfo, MCTargeDesc, AsmParser, and Disassembler
sublibraries of registered targets. This makes the CMakeLists accurately
reflect this intent in the code.

This should fix the last of the link errors that I have gotten reports
of on OS X, but if anyone continues to see link errors, continue to
pester me and I'll look into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 22:00:40 +00:00
Bill Wendling
af75f0ca86 Fix some validation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 06:47:33 +00:00
Bill Wendling
0246bb77db Fix some validation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 06:45:03 +00:00
Bill Wendling
dccc03b242 Add the 'resume' instruction for the new EH rewrite.
This adds the 'resume' instruction class, IR parsing, and bitcode reading and
writing. The 'resume' instruction resumes propagation of an existing (in-flight)
exception whose unwinding was interrupted with a 'landingpad' instruction (to be
added later).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 06:30:59 +00:00
Jakub Staszak
6762dc1fb3 Do not handle cases with >= and <= predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 05:54:04 +00:00
Jakub Staszak
4faf553d50 Remove untrue comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 04:51:14 +00:00
Jakub Staszak
a385c20d42 Do not handle case where LHS is equal to zero, because InstCombiner always moves
it to RHS anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136586 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 04:47:20 +00:00
Rafael Espindola
592ad6a82f Add a small gep optimization I noticed was missing while reading some IL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 04:43:41 +00:00
Jakob Stoklund Olesen
c47690264a Time the emission of debug values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 03:53:42 +00:00
Jakub Staszak
a5dd550588 Add Zero Heurestics to BranchProbabilityInfo. If we compare value to zero we
decide whether condition is likely to be true this way:

x == 0  ->  false
x <  0  ->  false
x <= 0  ->  false
x != 0  ->  true
x >  0  ->  true
x >= 0  ->  true


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 03:27:24 +00:00
Benjamin Kramer
e2721f7550 Remove InvalidateStructLayoutInfo from the ocaml bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-31 01:12:39 +00:00
Jakob Stoklund Olesen
21384c4ea8 Revert r136528 "Enable compact region splitting by default."
While this generally helped x86-64, there was some large regressions
for i386.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136571 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 17:19:14 +00:00
Chandler Carruth
61377a1f3c Switch another of the old dependencies on implicitly produced synthetic
rules to the new explicitly listed TableGen rules. Somehow I missed this
in my original sweep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 10:10:23 +00:00
Chandler Carruth
c58247da70 Remove yet another buried and hidden implicit dependency: every single
sub-library for the targets depended on the core target CodeGen library.
This completely undermined the careful work to separate the those
libraries, especially the MC-layer ones. This surfaced as circular
dependencies when the libraries were built as shared libraries where
CMake doesn't allow cycles.

This should fix PR10537. I'll watch the bots to see if there is fallout
on other platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 08:47:05 +00:00
Bill Wendling
10c6d12a9f Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444,
r136445, r136446, r136253 pending review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 05:42:50 +00:00
Sean Callanan
efd7919618 Added several architecture names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 01:29:54 +00:00
Jakob Stoklund Olesen
4af0f5fecb Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 00:57:25 +00:00
Chandler Carruth
2e1513d9cd Make my attempt to build up global deps variables actually utilize
globally scoped constructs. Also, round-trip these dependencies through
the LLVMConfig.cmake.in file thata is used by CMake-based clients of
"installed" (or built) LLVM trees.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:52:01 +00:00
Jakob Stoklund Olesen
eeb57c7701 Don't check liveness of unallocatable registers.
This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.

While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136541 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:36:21 +00:00
Jakob Stoklund Olesen
93e6f02759 Check for multiple defs in the machine code verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:02:48 +00:00
Owen Anderson
eb809f562e Correctly handle scattered operands where the bits of the operand are contiguous, but out of order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:01:18 +00:00
Jakob Stoklund Olesen
73e7dced38 Add an isSSA() flag to MachineRegisterInfo.
This flag is true from isel to register allocation when the machine
function is required to be in SSA form.  The TwoAddressInstructionPass
and PHIElimination passes clear the flag.

The SSA flag wil be used by the machine code verifier to check for SSA
form, and eventually an assertion can enforce it in +Asserts builds.
This will catch the common target error of creating machine code with
multiple defs of a virtual register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:51:22 +00:00
David Greene
05bce0beee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:43:06 +00:00
Jakub Staszak
c8f34de5d6 Do not lose branch weights when lowering SwitchInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:25:21 +00:00
Jakob Stoklund Olesen
9162abb39f Enable compact region splitting by default.
This helps generate better code in functions with high register
pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136528 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:10:27 +00:00
Eric Christopher
ef7f1e71f7 Add support for the 'Q' constraint.
Fixes rdar://9866494


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 21:18:58 +00:00
David Greene
b4f4cbd199 Remove a blank line from the top.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:50:18 +00:00
Chris Lattner
4cea5bae82 have the verifier catch gep's into opaque struct types. PR10473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:32:28 +00:00
Jim Grosbach
e1cf5902ec ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:26:09 +00:00
Chandler Carruth
c91d6263cf On mac, it seems the MC disassembler is actually using the targetinfo
for targets that don't have an MC-ized disassembler. I'm suspicious that
this shouldn't actually be happening, but hoping to fix the CMake build
on macs first, and investigate why second.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:23:34 +00:00
Jakub Staszak
95ece8efc0 Remove unneeded const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:05:36 +00:00
Jim Grosbach
33768dba54 ARM CPS mode immediate is 5 bits, not 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:02:39 +00:00
Devang Patel
6e8bb8a0cb Clear DbgValues in the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:49:58 +00:00
Jakub Staszak
6f6baf1bdd Add more constantness in BranchProbabilityInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:30:00 +00:00
David Greene
78621a851a [AVX] Make DagInits Unique
Make sure DagInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:26 +00:00
David Greene
65bf3ca9aa [AVX] Make FieldInit Unique
Make sure FieldInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:24 +00:00
David Greene
08f71e3e74 [AVX] Make VarListElementInit Unique
Make sure VarListElementInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136499 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:23 +00:00
David Greene
aa839b8fa3 [AVX] Make VarBitInit Unique
Make sure VarBitInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:22 +00:00