Commit Graph

92402 Commits

Author SHA1 Message Date
Benjamin Kramer
927d8dcb47 MathExtras: Return the result of find(First|Last)Set in the input type.
Otherwise ZB_Max returns a wrong result when sizeof(T) > sizeof(size_t).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182684 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 22:25:20 +00:00
Michael J. Spencer
c6af2432c8 Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182680 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 22:23:49 +00:00
Michael J. Spencer
54c7482388 [Support][MathExtras] Fix literal type issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182679 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 22:19:05 +00:00
Michael J. Spencer
c93cdefa30 Add missing header for atexit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182672 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 20:54:11 +00:00
Michael J. Spencer
a0cfb8f21b [Support][MathExtras] Add missing include and disable _BitScan{Forward,Reverse}64 on non x64 MSVC systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182671 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 20:51:59 +00:00
Michael Gottesman
7932798384 [objc-arc] KnownSafe does not imply that it is safe to perform code motion across CFG edges since even if it is safe to remove RR pairs, we may still be able to move a retain/release into a loop.
rdar://13949644

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182670 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 20:44:05 +00:00
Michael Gottesman
35e88e57ea [objc-arc] Make sure that multiple owners is propogated correctly through the pass via the usage of a global data structure.
rdar://13750319

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 20:44:02 +00:00
Michael J. Spencer
36fe3f2b56 [Support] Add type generic bit utilities to MathExtras.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 20:29:47 +00:00
Benjamin Kramer
959ecb2eec LoopVectorize: LoopSimplify can't canonicalize loops with an indirectbr in it, don't assert on those cases.
Fixes PR16139.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 18:05:35 +00:00
Diego Novillo
fe808927ac Do not reserve space for the ColdEdges and NormalEdges vectors.
Discussion and rationale at
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130520/175698.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 17:00:22 +00:00
Richard Sandiford
bfe3212dd8 [SystemZ] Improve AsmParser handling of invalid instructions
Previously, an invalid instruction like:

	foo     %r1, %r0

would generate the rather odd error message:

....: error: unknown token in expression
	foo     %r1, %r0
		^

We now get the more informative:

....: error: invalid instruction
	foo     %r1, %r0
	^

The same would happen if an address were used where a register was expected.
We now get "invalid operand for instruction" instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182644 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 14:26:46 +00:00
Richard Sandiford
f386961da3 [SystemZ] Improve AsmParser register parsing
The idea is to make sure that:

(1) "register expected" is restricted to cases where ParseRegister()
    is called and the token obviously isn't a register.

(2) "invalid register" is restricted to cases where a register-like "%..."
    sequence is found, but the "..." makes no sense.

(3) the generic "invalid operand for instruction" is used in cases where
    the wrong register type is used (GPR instead of FPR, etc.).

(4) the new "invalid register pair" is used if the register has the right type,
    but is not a valid register pair.

Testing of (1)-(3) is now restricted to regs-bad.s.  It uses a representative
instruction for each register class to make sure that only registers from
that class are accepted.

(4) is tested by both regs-bad.s (which checks all invalid register pairs)
and insn-bad.s (which tests one invalid pair for each instruction that
requires a pair).

While there, I changed "Number" to "Num" for consistency with the
operand class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182643 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 14:14:38 +00:00
Joey Gouly
7ab9fb02f8 Run clang-format over the scalarizePHI function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182640 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 12:33:28 +00:00
Joey Gouly
4a941316cd scalarizePHI needs to insert the next ExtractElement in the same block
as the BinaryOperator, *not* in the block where the IRBuilder is currently
inserting into. Fixes a bug where scalarizePHI would create instructions
that would not dominate all uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182639 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 12:29:54 +00:00
Diego Novillo
77226a03dc Add a new function attribute 'cold' to functions.
Other than recognizing the attribute, the patch does little else.
It changes the branch probability analyzer so that edges into
blocks postdominated by a cold function are given low weight.

Added analysis and code generation tests.  Added documentation for the
new attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182638 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 12:26:52 +00:00
Benjamin Kramer
49a6a8d8f2 Remove the Copied parameter from MemoryObject::readBytes.
There was exactly one caller using this API right, the others were relying on
specific behavior of the default implementation. Since it's too hard to use it
right just remove it and standardize on the default behavior.

Defines away PR16132.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182636 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 10:54:58 +00:00
Daniel Jasper
35b2a7a545 Fix unused warning in opt builds.
In these builds, the asserts() are completely compiled out of the code
leaving "End" unused. Directly accessing it, should not have a
performance impact, as it is just a data member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 06:26:18 +00:00
Ahmed Bougacha
ef99356dfe MC: Disassembled CFG reconstruction.
This patch builds on some existing code to do CFG reconstruction from
a disassembled binary:
- MCModule represents the binary, and has a list of MCAtoms.
- MCAtom represents either disassembled instructions (MCTextAtom), or
  contiguous data (MCDataAtom), and covers a specific range of addresses.
- MCBasicBlock and MCFunction form the reconstructed CFG. An MCBB is
  backed by an MCTextAtom, and has the usual successors/predecessors.
- MCObjectDisassembler creates a module from an ObjectFile using a
  disassembler. It first builds an atom for each section. It can also
  construct the CFG, and this splits the text atoms into basic blocks.

MCModule and MCAtom were only sketched out; MCFunction and MCBB were
implemented under the experimental "-cfg" llvm-objdump -macho option.
This cleans them up for further use; llvm-objdump -d -cfg now generates
graphviz files for each function found in the binary.

In the future, MCObjectDisassembler may be the right place to do
"intelligent" disassembly: for example, handling constant islands is just
a matter of splitting the atom, using information that may be available
in the ObjectFile. Also, better initial atom formation than just using
sections is possible using symbols (and things like Mach-O's
function_starts load command).

This brings two minor regressions in llvm-objdump -macho -cfg:
- The printing of a relocation's referenced symbol.
- An annotation on loop BBs, i.e., which are their own successor.

Relocation printing is replaced by the MCSymbolizer; the basic CFG
annotation will be superseded by more related functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182628 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 01:07:04 +00:00
Ahmed Bougacha
2c94d0faa0 Add MCSymbolizer for symbolic/annotated disassembly.
This is a basic first step towards symbolization of disassembled
instructions. This used to be done using externally provided (C API)
callbacks. This patch introduces:
- the MCSymbolizer class, that mimics the same functions that were used
  in the X86 and ARM disassemblers to symbolize immediate operands and
  to annotate loads based off PC (for things like c string literals).
- the MCExternalSymbolizer class, which implements the old C API.
- the MCRelocationInfo class, which provides a way for targets to
  translate relocations (either object::RelocationRef, or disassembler
  C API VariantKinds) to MCExprs.
- the MCObjectSymbolizer class, which does symbolization using what it
  finds in an object::ObjectFile. This makes simple symbolization (with
  no fancy relocation stuff) work for all object formats!
- x86-64 Mach-O and ELF MCRelocationInfos.
- A basic ARM Mach-O MCRelocationInfo, that provides just enough to
  support the C API VariantKinds.

Most of what works in otool (the only user of the old symbolization API
that I know of) for x86-64 symbolic disassembly (-tvV) works, namely:
- symbol references: call _foo; jmp 15 <_foo+50>
- relocations:       call _foo-_bar; call _foo-4
- __cf?string:       leaq 193(%rip), %rax ## literal pool for "hello"
Stub support is the main missing part (because libObject doesn't know,
among other things, about mach-o indirect symbols).

As for the MCSymbolizer API, instead of relying on the disassemblers
to call the tryAdding* methods, maybe this could be done automagically
using InstrInfo? For instance, even though PC-relative LEAs are used
to get the address of string literals in a typical Mach-O file, a MOV
would be used in an ELF file. And right now, the explicit symbolization
only recognizes PC-relative LEAs. InstrInfo should have already have
most of what is needed to know what to symbolize, so this can
definitely be improved.

I'd also like to remove object::RelocationRef::getValueString (it seems
only used by relocation printing in objdump), as simply printing the
created MCExpr is definitely enough (and cleaner than string concats).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 00:39:57 +00:00
Ulrich Weigand
586f6d009a [PowerPC] Remove symbolLo/symbolHi instruction operand types
Now that there is no longer any distinction between symbolLo
and symbolHi operands in either printing, encoding, or parsing,
the operand types can be removed in favor of simply using
s16imm.

This completes the patch series to decouple lo/hi operand part
processing from the particular instruction whose operand it is.

No change in code generation expected from this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182618 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 22:48:06 +00:00
Daniel Malea
f8c243abba Re-implement DebugIR in a way that does not subclass AssemblyWriter:
- move AsmWriter.h from public headers into lib
- marked all AssemblyWriter functions as non-virtual; no need to override them
- DebugIR now "plugs into" AssemblyWriter with an AssemblyAnnotationWriter helper
- exposed flags to control hiding of a) debug metadata b) debug intrinsic calls

C/R: Paul Redmond



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182617 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 22:34:33 +00:00
Ulrich Weigand
edaa58ee66 [PowerPC] Clean up generation of ha16() / lo16() markers
When targeting the Darwin assembler, we need to generate markers ha16() and
lo16() to designate the high and low parts of a (symbolic) immediate.  This
is necessary not just for plain symbols, but also for certain symbolic
expression, typically along the lines of ha16(A - B).  The latter doesn't
work when simply using VariantKind flags on the symbol reference.
This is why the current back-end uses hacks (explicitly called out as such
via multiple FIXMEs) in the symbolLo/symbolHi print methods.

This patch uses target-defined MCExpr codes to represent the Darwin
ha16/lo16 constructs, following along the lines of the equivalent solution
used by the ARM back end to handle their :upper16: / :lower16: markers.
This allows us to get rid of special handling both in the symbolLo/symbolHi
print method and in the common code MCExpr::print routine.  Instead, the
ha16 / lo16 markers are printed simply in a custom print routine for the
target MCExpr types.  (As a result, the symbolLo/symbolHi print methods
can now replaced by a single printS16ImmOperand routine that also handles
symbolic operands.)

The patch also provides a EvaluateAsRelocatableImpl routine to handle
ha16/lo16 constructs.  This is not actually used at the moment by any
in-tree code, but is provided as it makes merging into David Fang's
out-of-tree Mach-O object writer simpler.

Since there is no longer any need to treat VK_PPC_GAS_HA16 and
VK_PPC_DARWIN_HA16 differently, they are merged into a single
VK_PPC_ADDR16_HA (and likewise for the _LO16 types).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 22:26:41 +00:00
Bill Wendling
8c18a6fe37 The command line options need to be processed before we create the TargetMachine.
Move the processing of the command line options to right before we create the
TargetMachine instead of after.
<rdar://problem/13468287>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 21:21:50 +00:00
Tim Northover
5a02fc4b5f ARM: implement @llvm.readcyclecounter intrinsic
This implements the @llvm.readcyclecounter intrinsic as the specific
MRC instruction specified in the ARM manuals for CPUs with the Power
Management extensions.

Older CPUs had slightly different methods which may also have to be
implemented eventually, but this should cover all v7 cases.

rdar://problem/13939186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 19:11:20 +00:00
Tim Northover
b94a353242 ARM: Add Performance Monitor Extensions feature
Performance monitors, including a basic cycle counter, are an official
extension in the ARMv7 specification. This adds support for enabling and
disabling them, orthogonally from CPU selection.

rdar://problem/13939186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182602 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 19:11:14 +00:00
Tom Stellard
d078070f6a R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg
Patch by: Vincent Lejeune

https://bugs.freedesktop.org/show_bug.cgi?id=64877

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 18:26:42 +00:00
Benjamin Kramer
5c35290fa3 Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182594 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 17:10:37 +00:00
Jakob Stoklund Olesen
e0b59774cb Fix PR16110: Handle DBG_VALUE in ConnectedVNInfoEqClasses::Distribute().
Now that the LiveDebugVariables pass is running *after* register
coalescing, the ConnectedVNInfoEqClasses class needs to deal with
DBG_VALUE instructions.

This only comes up when rematerialization during coalescing causes the
remaining live range of a virtual register to separate into two
connected components.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 17:02:23 +00:00
Benjamin Kramer
603100d3de More symbols that should be static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182590 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 16:09:15 +00:00
Benjamin Kramer
a32218a7ec Hexagon: Make helper functions static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 15:43:11 +00:00
Benjamin Kramer
879b071bf5 R600: Hide symbols of implementation details.
Also removes an unused function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182587 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 15:43:05 +00:00
Benjamin Kramer
2db14ba90c InlineSpiller: Store bucket pointers instead of iterators.
Lets us use a SetVector instead of an explicit set + vector combination.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182586 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 15:42:57 +00:00
Aaron Ballman
061ff3409d Setting the default value (fixes CRT assertions about uninitialized variable use when doing debug MSVC builds), and fixing coding style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182585 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 14:55:00 +00:00
Rafael Espindola
7eac032203 Fix 32 bit build in c++11 mode.
The error was:
error: non-constant-expression cannot be narrowed from type 'long long' to 'long' in initializer list [-Wc++11-narrowing]
        MI.getOperand(6).getImm() & 0x1F,

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182584 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 13:22:30 +00:00
Nick Lewycky
fa03ff99b2 Add missing test from r175092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 07:46:13 +00:00
Rafael Espindola
5110102f9f Fix a leak on the r600 backend.
This should bring the valgrind bot back to life.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182561 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 03:31:47 +00:00
Rafael Espindola
23e24bd284 clang-format this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182560 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 03:28:39 +00:00
Rafael Espindola
1529f0c718 Remove redundant rpath.
These are not needed since we added the $ORIGIN based rpath.

Fixes pr12517.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182559 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 02:53:22 +00:00
Rafael Espindola
b58484ecd6 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182558 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 02:38:50 +00:00
Michael Gottesman
e5b97900b2 [objc-arc] Fixed number of prefixing slashes in some comments in a function from 3 to 2 to match the rest of ObjCARCOpts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182557 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 02:35:21 +00:00
Michael Gottesman
a519666423 Fixed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182556 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 02:03:05 +00:00
Michael Gottesman
cbc8777c58 Updated the comments of APInt.h to match the llvm style guide and be consistent. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 02:00:03 +00:00
Kevin Enderby
b737702efd Missed removing one of the assert()'s from the LLVMCreateDisasmCPU() library
API with my 176880 revision.  If a bad Triple is passed in it can also assert.
In this case too it should just return 0 to indicate failure to create the
disassembler.

rdar://13955214


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182542 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 00:32:34 +00:00
Chad Rosier
549221f18c Minor fix to comment from my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 23:25:59 +00:00
Chad Rosier
6cd0d18f5e Simplify the logic described in the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182534 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 23:23:14 +00:00
David Blaikie
3d33184d9d Solidify the assumption that a DW_TAG_subprogram's type is a DW_TAG_subroutine_type
There were bits & pieces of code lying around that may've given the
impression that debug info metadata supported the possibility that a
subprogram's type could be specified by a non-subroutine type describing
the return type of a void function. This support was incomplete &
unnecessary. Asserts & API have been changed to make the desired usage
more clear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182532 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 23:22:18 +00:00
Chad Rosier
62c320a755 Simplify logic now that r182490 is in place. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182531 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 23:17:36 +00:00
Chad Rosier
b018bab0b8 Simplify logic now that r182490 is in place. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182527 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 22:36:55 +00:00
Chad Rosier
5cc3c989fc Simplify logic now that r182490 is in place. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182526 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 22:26:05 +00:00
Bill Schmidt
d35da5055b Recognize ValueType operands in source patterns for fast-isel.
Currently the fast-isel table generator recognizes registers, register
classes, and immediates for source pattern operands.  ValueType
operands are not recognized.  This is not a problem for existing
targets with fast-isel support, but will not work for targets like
PowerPC and SPARC that use types in source patterns.

The proposed patch allows ValueType operands and treats them in the
same manner as register classes.  There is no convenient way to map
from a ValueType to a register class, but there's no need to do so.
The table generator already requires that all types in the source
pattern be identical, and we know the register class of the output
operand already.  So we just assign that register class to any
ValueType operands we encounter.

No functional effect on existing targets.  Testing deferred until the
PowerPC target implements fast-isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182512 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 20:45:11 +00:00