Commit Graph

21 Commits

Author SHA1 Message Date
Misha Brukman
dfbfc57d78 Fixed the number translation scheme for the integer condition code registers: it
now works in instructions which require a 2-bit or 3-bit INTcc code.

Incidentally, that means that the representation of INTcc registers is now the
same in both integer and FP instructions. Thus, code became much simpler and
cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7185 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-16 20:30:40 +00:00
Misha Brukman
07d4516f92 Correctly handle calls to functions which are further away than 2**32 bits will
allow, i.e. make a sequence of instructions to enable an indirect call using
jump-and-link and 2 temporary registers (which we save and ultimately restore).

Warning: if the delay slot of a function call is used to do meaningful work and
not just a NOP, this behavior is incorrect. However, the Sparc backend does not
yet utilize the delay slots effectively, so it is not necessary to make an
overly complicated algorithm for something that's not used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7178 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-15 19:09:43 +00:00
Misha Brukman
173e250548 * Added support for the %ccr register
* FP double registers are now coded correctly
* Removed function which converted registers based on register types, it was
  broken (because regTypes are broken)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7175 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-14 23:26:03 +00:00
Misha Brukman
9cedd433eb Apparently, the "regType" and "regClass" used in the Sparc backend are not both
correct: empirically, "regType" is wrong for a number of registers. Thus, one
can only rely on the "regClass" to figure out what kind of register one is
dealing with.

This change switches to using only "regClass" and adds a few extra DEBUG() print
statements and a few clean-ups in comments and code, mostly minor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7103 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-03 18:36:47 +00:00
Misha Brukman
8631ac4b76 Print address out as hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6657 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:53:28 +00:00
Misha Brukman
de07be3b78 Fixed a bunch of test cases in test/Regression/Jello which could not get the
address of a floating-point (allocated via ConstantPool) correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 04:41:22 +00:00
Misha Brukman
3339459e48 * If a global is not a function, just ask the MachineCodeEmitter for the addr
* Do not block a print statement with a DEBUG() guard if we're going to abort()


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6645 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 03:35:37 +00:00
Misha Brukman
8f1222245e Put all debug print statements under the DEBUG() guard to make output clean so
that tests can automatically diff the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6642 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 00:26:11 +00:00
Misha Brukman
6994dab12a Fixed confusion between register classes and register types.
Now %fcc registers are recognized correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6640 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:51:10 +00:00
Misha Brukman
f47d9c28d9 Added lazy function resolution to the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6633 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:52:06 +00:00
Misha Brukman
a2196c1aae * Instead of re-inventing the MachineConstantPool emitter that's already given
in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6612 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:01:13 +00:00
Misha Brukman
e8e28dd7af Constants are laid out in memory in PC-relative form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6568 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:24:12 +00:00
Misha Brukman
eaaf8ad3cc Clean up after merging in SparcEmitter.cpp; branches and return work again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6536 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 05:24:46 +00:00
Misha Brukman
f86aaa8eb7 Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
from lib/Target/X86/X86CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6530 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 04:12:39 +00:00
Brian Gaeke
c3eaa89933 Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6522 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 02:13:26 +00:00
Misha Brukman
dcbe712841 Removed useless code -- the byte order of output code is correct as is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 06:26:06 +00:00
Misha Brukman
a9f7f6e25d Added:
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6449 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:17:33 +00:00
Misha Brukman
f2ef76782d Fixed an error preventing compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6381 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:48:28 +00:00
Misha Brukman
0d60345dcf Keep track of the current BasicBlock being processed so that a referencing
MachineInstr can later be patched up correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6378 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:41:44 +00:00
Misha Brukman
0cc640e6c8 Broke out class definition from SparcV9CodeEmitter, and added ability to take a
MachineCodeEmitter to make a pass-through debugger -- output to memory and to
std::cerr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6363 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 21:45:05 +00:00
Misha Brukman
3de36f5309 SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function
that assembles instructions is generated via TableGen (and hence must be built
before building this directory, but that's already the case in the top-level
Makefile).

Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc',
which is included by SparcV9CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6357 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 20:07:58 +00:00