Commit Graph

694 Commits

Author SHA1 Message Date
Evan Cheng
9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
Dan Gohman
89964b4ca1 Fix this test on hosts that don't have sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:40:51 +00:00
Dan Gohman
38459f01c0 Make this test x86-specific for now; targets that don't use
the automated CallingConv code to handle return values typically
don't support multiple return values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48265 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 00:25:14 +00:00
Anton Korobeynikov
f1765e8298 Testcase for PR2137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:43:42 +00:00
Anton Korobeynikov
0fb2033f91 Update testcase for recent aliases change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:42:20 +00:00
Dan Gohman
6a6d27ac0b Add a test to ensure that all-ones vectors are materialized with pcmpeqd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48247 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:37:00 +00:00
Dan Gohman
9736028d84 Use the correct value for InSignBit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:29:43 +00:00
Chris Lattner
e12ecf272d Implement basic support for the 'f' register class constraint. This basically
works, but probably won't if you mix it with 't' or 'u' yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:50:13 +00:00
Evan Cheng
676dd7c80b When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:19:34 +00:00
Chris Lattner
03fdec04d1 Don't emit FP_REG_KILL into a block that just returns. Nothing
can be live out of the block anyway, so it isn't needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:34:12 +00:00
Dan Gohman
76c605b18e Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 20:42:19 +00:00
Dale Johannesen
45bcbf491c These tests don't work unless SSE2 is active.
Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 17:33:57 +00:00
Dale Johannesen
ca765303fb There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 17:13:37 +00:00
Evan Cheng
4ff3f1cc57 - Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.                                                                                                 
 A = or A, B                                                                                                                                                            
 ...                                                                                                                                                                    
 B = A                                                                                                                                                                  
 ...                                                                                                                                                                    
 C = A<kill>                                                                                                                                                            
 ...                                                                                                                                                                    
   = B                                                                                                                                                                  
                                                                                                                                                                        
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 08:11:32 +00:00
Evan Cheng
f79e60649a Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 07:19:13 +00:00
Chris Lattner
f30e1cf9b7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 09:15:31 +00:00
Chris Lattner
02b6d25a27 Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 08:49:15 +00:00
Chris Lattner
ce6e492997 reduce this testcase more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 06:57:21 +00:00
Chris Lattner
67f453aae7 Finish implementing a readme entry: when inserting an i64 variable
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 05:42:06 +00:00
Chris Lattner
62098040a1 Implement a readme entry, compiling
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 01:05:04 +00:00
Chris Lattner
da8de316a8 make this test harder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 00:30:06 +00:00
Chris Lattner
f3ba434781 Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 23:43:36 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Chris Lattner
d1108222fd mark frem as expand for all legal fp types on x86, regardless of whether
we're using SSE or not.  This fixes PR2122.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07 06:36:32 +00:00
Chris Lattner
ec4a5672f8 Generalize FP constant shrinking optimization to apply to any vt
except ppc long double.  This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 06:48:13 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:30:59 +00:00
Evan Cheng
a26e0fe1b4 Really fix the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 08:01:56 +00:00
Evan Cheng
6a2286a045 Fix broken test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 07:59:13 +00:00
Evan Cheng
f92dd28ab7 Add PR1501 test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 00:47:45 +00:00
Chris Lattner
767486b1d5 Evan implemented these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-02 18:05:14 +00:00
Evan Cheng
e526d8a955 Set to default: x86 no longer fold and into test if it has more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 07:46:38 +00:00
Evan Cheng
21b3f31f8f Fix a bug in dead spill slot elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 19:57:11 +00:00
Chris Lattner
e416b7d407 actually run llc, thanks Dan :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 17:46:54 +00:00
Evan Cheng
be680dcea6 Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 10:04:56 +00:00
Chris Lattner
b09916bdfb Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:57:41 +00:00
Chris Lattner
d0ba2a9c14 Compile x86-64-and-mask.ll into:
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:47:54 +00:00
Evan Cheng
d36531249a Spiller now remove unused spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 03:04:06 +00:00
Evan Cheng
4d535cadf1 Enable -coalescer-commute-instrs by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 20:40:22 +00:00
Dan Gohman
d4cf992230 Avoid aborting on invalid shift counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:50:50 +00:00
Eli Friedman
9ec8095485 Fix for pr2093: direct operands aren't necessarily addresses, so don't
try to simplify them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:37:49 +00:00
Evan Cheng
c886c460e4 This is possible:
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 08:03:41 +00:00
Evan Cheng
9bf12b5583 Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
operands into inline asm block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47589 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 02:42:37 +00:00
Evan Cheng
249ded3fa8 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 03:38:34 +00:00
Evan Cheng
aaa1d4265e Update test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47527 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:57:25 +00:00
Evan Cheng
18924f11c1 Remat of pic loads are now on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47525 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:08:30 +00:00
Evan Cheng
28c9fc630c Really. Why doesn't every arch support MMX?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 00:56:14 +00:00
Evan Cheng
530d47f4f2 Test case for PR2082.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47501 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 20:38:49 +00:00
Evan Cheng
d8850a512e Allow re-materialization of pic load (controlled by -remat-pic-load for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 09:25:47 +00:00
Chris Lattner
d2b1fb27df copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 05:18:04 +00:00
Chris Lattner
149a4e56fc Start using GPR's to copy around mmx value instead of mmx regs.
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 02:09:43 +00:00