Commit Graph

110 Commits

Author SHA1 Message Date
Daniel Dunbar
fba88d49e3 MC/X86: Tweak imul recognition, previous hack only applies for the imul form
taking immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:37:56 +00:00
Daniel Dunbar
ae528f65ba MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:24:18 +00:00
Daniel Dunbar
ee9102587e MC/X86: Warn on scale factors > 1 without index register, instead of erroring,
for 'as' compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:13:38 +00:00
Chris Lattner
0d857cf8d1 remove some code that is dead now that lea's are modeled with segment registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 02:40:44 +00:00
Daniel Dunbar
09062b1672 MC/X86/AsmParser: Give an explicit error message when we reject an instruction
because it could have an ambiguous suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:42 +00:00
Daniel Dunbar
f1e29d4c21 MC/AsmParser: Push the burdon of emitting diagnostics about unmatched
instructions onto the target specific parser, which can do a better job.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:38 +00:00
Daniel Dunbar
b3cb696794 MCAsmParser: Add dump() hook to MCParsedAsmOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 06:37:04 +00:00
Bruno Cardoso Lopes
3c8e1bee63 Support x86 "eiz" and "riz" pseudo index registers in the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24 00:06:39 +00:00
Bruno Cardoso Lopes
f64a7d49a0 Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 22:15:26 +00:00
Bruno Cardoso Lopes
f528d2b438 Add AVX version of CLMUL instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 18:41:12 +00:00
Daniel Dunbar
90b374cded MC/X86: We now match instructions like "incl %eax" correctly for the arch we are
assembling; remove crufty custom cleanup code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 06:14:54 +00:00
Daniel Dunbar
54074b5f04 TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 05:44:09 +00:00
Daniel Dunbar
d73ada7d24 Target: Give the TargetAsmParser access to the TargetMachine.
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 00:33:49 +00:00
Benjamin Kramer
38e59891ee Don't pass StringRef by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 22:38:02 +00:00
Kevin Enderby
52a18aedae Added a check that pusha cannot be encoded in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 20:05:41 +00:00
Bruno Cardoso Lopes
cc69e13a36 Add more assembly opcodes for SSE compare instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 22:24:03 +00:00
Chris Lattner
645b209c4a Teach the x86 mc assembler that %dr6 = %db6, this implements
rdar://8013734


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:29:18 +00:00
Chris Lattner
adabe1a92c more cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:18:14 +00:00
Chris Lattner
02758a44e4 reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106723 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:16:25 +00:00
Bruno Cardoso Lopes
428256b818 Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Kevin Enderby
09712b57ce Incremental improvement to the handling of the x86 "Jump if rCX Zero"
instruction.  Added the 64-bit version "jrcxz" so it is recognized and also
added the checks for incorrect uses of "jcxz" in 64-bit mode and "jrcxz" in
32-bit mode.  Still to do is to correctly handle the encoding of the
instruction adding the Address-size override prefix byte, 0x67, when the width
of the count register is not the same as the mode the machine is running in.
Which for example means the encoding of "jecxz" depends if you are assembling
as a 32-bit target or a 64-bit target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 23:48:44 +00:00
Kevin Enderby
31cc9655b6 MC/X86: Add alias for movzx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab MC/X86: Add alias for fwait.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 20:59:10 +00:00
Kevin Enderby
bd658918df MC/X86: Add aliases for Jcc variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 21:33:19 +00:00
Kevin Enderby
cf50a5390c Changed the encoding of X86 floating point stack operations where both operands
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 20:52:34 +00:00
Daniel Dunbar
39e2dd7bab MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:32 +00:00
Kevin Enderby
ca956dc0f6 MC/X86: Add aliases for CMOVcc variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:32:23 +00:00
Daniel Dunbar
62e4c671b6 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:33 +00:00
Daniel Dunbar
4c361972fd MC/X86: Add alias for setz, setnz, jz, jnz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 06:37:33 +00:00
Kevin Enderby
9d31d79493 Added retl for 32-bit x86 and added retq for 64-bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 23:01:38 +00:00
Daniel Dunbar
1fe591da3e X86: Model i64i32imm properly, as a subclass of all immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:20:39 +00:00
Dan Gohman
e5e4ff974d Fix assembly parsing and encoding of the pushf and popf family of
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 16:16:00 +00:00
Chris Lattner
b5505d0ee3 reapply r103668 with a fix. Never make "minor syntax changes"
after testing before committing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:02:47 +00:00
Chris Lattner
3519f9d7d1 revert r103668 for now, it is apparently breaking things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:40:59 +00:00
Chris Lattner
0de8e3f10a moffset forms of moves are x86-32 only, make the parser
lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:13:36 +00:00
Daniel Dunbar
0481449a05 MC/X86: Extend suffix matching hack to match 'q' suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103535 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:54:20 +00:00
Daniel Dunbar
e9f0fb4179 MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 17:31:02 +00:00
Daniel Dunbar
c918d6043b MC/X86: Add "support" for matching ATT style mnemonic prefixes.
- The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 16:12:42 +00:00
Chris Lattner
eef6d78be1 teach the x86 asm parser how to handle segment prefixes
in memory operands.  rdar://7874844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 18:56:34 +00:00
Daniel Dunbar
f2de13f8d7 MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I believe this fixes the last memory leaks under test/MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:36:38 +00:00
Daniel Dunbar
f98bc6320b MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:06:02 +00:00
Daniel Dunbar
d5e7705a05 MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
other functionality on 403.gcc compiled at -O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:29 +00:00
Jeffrey Yasskin
150ae11976 Fix LLVM build when the user specifies CPPFLAGS on the make command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12 21:42:14 +00:00
Daniel Dunbar
9c60f534cb MC/X86: Push immediate operands as immediates not expressions when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Daniel Dunbar
1b6c060591 MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
x86_32-encoding.s in on expectation of it passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:19:28 +00:00
Chris Lattner
e16b0fc3cb Implement x86 asm parsing support for %st and %st(4)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:49:22 +00:00
Chris Lattner
b8d6e98e56 pass stringref by value instead of by const&
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:34:28 +00:00
Sean Callanan
3bdbdd06c8 Fixed the AT&T AsmLexer to report the proper strings
for register tokens.  Before, if it encountered
'%al,' it would report 'al,' as the token.  Now it
correctly reports '%al'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:50:23 +00:00
Kevin Enderby
12ce0de462 Added support for X86 instruction prefixes so llvm-mc can assemble them. The
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:04:42 +00:00
Daniel Dunbar
e7070e9006 AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:46:47 +00:00