Commit Graph

51929 Commits

Author SHA1 Message Date
Benjamin Kramer
903456245b Hexagon: Fix a nasty order-of-initialization bug.
Reenable the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146750 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 19:08:59 +00:00
Devang Patel
c104cf2002 In DICompositeType, referenced to derived type is either metadata or null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 17:51:31 +00:00
Jakob Stoklund Olesen
f5bb45f895 Note ARM constant island alignment in the release notes.
The command line option should be removed, but not until the feature has
gotten a lot of testing. The ARMConstantIslandPass tends to have subtle
bugs that only show up after a while.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 16:07:41 +00:00
Manuel Klimek
76f13017fc Adds a JSON parser and a benchmark (json-bench) to catch performance regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 13:09:10 +00:00
Chris Lattner
9646acfccf By popular demand, link up types by name if they are isomorphic and one is an
autorenamed version of the other.   This makes the IR easier to read, because
we don't end up with random renamed versions of the types after LTO'ing a large app.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 08:36:07 +00:00
Craig Topper
94438ba538 Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is supported. Fix 'unpackh v, v' for 256-bit types to understand 128-bit lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 08:06:31 +00:00
NAKAMURA Takumi
46209476e7 Target/Hexagon: Fix CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 06:21:02 +00:00
Andrew Trick
1da282764a Avoid a confusing assert for silly options: -unroll-runtime -unroll-count=1.
No need for an explicit test case for an unsupported combination of options.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 02:03:48 +00:00
Jim Grosbach
ddecfe54a3 ARM NEON aliases for vmovq.f*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 00:12:22 +00:00
Jim Grosbach
b6744db06f Thumb2 ADR assembly parsing w/o the .w suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 23:52:17 +00:00
Eli Friedman
7e840efc23 Make sure we correctly note the existence of an i8 immediate for vblendvps and friends, so we compute fixups correctly. PR11586.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 23:46:18 +00:00
Nick Lewycky
028700f544 Move parts of lib/Target that use CodeGen into lib/CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146702 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:58:58 +00:00
Eli Friedman
2f21e8c5ba Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a value that isn't a 32-bit value. (This is just to be safe; I don't think this actually causes any issues in practice.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146700 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:56:53 +00:00
Jim Grosbach
a738da7bd3 ARM NEON VCLE is an alias for VCGE w/ the source operands reversed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146699 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:56:33 +00:00
Kostya Serebryany
a4b2b1d8fb [asan] add the name of the module to the description of a global variable. This improves the readability of global-buffer-overflow reports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146698 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:55:55 +00:00
Tony Linthicum
d239ff67f2 Add MCTargetDesc library to Hexagon target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146692 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:29:08 +00:00
Jim Grosbach
60d99a5278 ARM NEON VTBL/VTBX assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:27:11 +00:00
Jakob Stoklund Olesen
b6ff6ec85e Enable proper constant island alignment by default.
The code size increase is tiny (< 0.05%) because so little code uses
16-byte constant pool entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:14:45 +00:00
Chad Rosier
c8dd20170e Add missing zmovl AVX patterns which were causing crashes.
Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 22:11:31 +00:00
Kostya Serebryany
7bcfc9950b [asan] fix a bug (issue 19) where dlclose and the following mmap caused a false positive. compiler part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 21:59:03 +00:00
Jim Grosbach
276ed0344c Silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 21:54:55 +00:00
Jim Grosbach
0aaf4cd9b3 ARM NEON two-register double spaced register list parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 21:44:33 +00:00
Chad Rosier
0660cfe3c8 Fix assert in LowerBUILD_VECTOR for v16i16 type on AVX.
Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 21:34:44 +00:00
Lang Hames
a0a251372f Fix VSELECT operand order. Was previously backwards, causing bogus vector shift results - <rdar://problem/10559581>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 18:57:27 +00:00
Devang Patel
0508d047fe Update DebugLoc while merging nodes at -O0.
Patch by Kyriakos Georgiou!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 18:21:18 +00:00
Devang Patel
9642c57ac5 Virtual table holder field is either metadata or null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 17:55:56 +00:00
Hal Finkel
7f370b6155 Ensure that the nop that should follow a bl call in PPC64 ELF actually does
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 17:54:01 +00:00
Richard Osborne
27a7859bf7 Pass optLevel to XCoreDAGToDAGISel.
Patch by Kyriakos Georgiou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 15:18:35 +00:00
Eli Friedman
adeb0a6e64 Make constant folding for GEPs a bit more aggressive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 04:33:48 +00:00
Eli Friedman
ca072a3977 Don't try to form FGETSIGN after legalization; it is possible in some cases, but the existing code can't do it correctly. PR11570.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 02:07:20 +00:00
Chad Rosier
01d426e0e1 Use SmallVector/assign(), rather than std::vector/push_back().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 01:16:09 +00:00
Chad Rosier
a860b189e4 Add support for lowering fneg when AVX is enabled.
rdar://10566486


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 01:02:25 +00:00
Pete Cooper
4e5a1ab10b Added InstCombine for "select cond, ~cond, x" type patterns
These can be reduced to "~cond & x" or "~cond | x"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 00:56:45 +00:00
Owen Anderson
4e0adfa7f7 Enable synthesis of FLOG2 and FEXP2 SelectionDAG nodes from libm calls. These are already marked as illegal by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 00:54:12 +00:00
Eli Friedman
7d1ff37118 Make loop preheader insertion in LoopSimplify handle the case where the loop header is a landing pad correctly (by splitting the landingpad out of the loop header). Make some adjustments to the rest of LoopSimplify to make it clear that the rest of LoopSimplify isn't making bad assumptions about the presence of landing pads. PR11575.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 00:50:34 +00:00
Bill Wendling
7a13b72bbb Re-re-enable compact unwind after fixing a failure in SingleSource/Benchmarks/Shootout-C++/except.cpp and friends. It was encoding the stored registers in the wrong order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146617 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 00:14:24 +00:00
Kevin Enderby
dac2953e3b Another improvement to the implementation of .incbin directive by avoiding a
buffer copy.  Suggestion by Chris Lattner!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146614 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15 00:00:27 +00:00
Bill Wendling
10e412ec6b The saved registers weren't being processed in the correct order. This lead to
the compact unwind claiming that one register was saved before another, which
isn't all that great in general. Process them in the natural order. Reverse the
list only when necessary for the algorithm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146612 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:53:24 +00:00
Dan Gohman
f042660197 Move Instruction::isSafeToSpeculativelyExecute out of VMCore and
into Analysis as a standalone function, since there's no need for
it to be in VMCore. Also, update it to use isKnownNonZero and
other goodies available in Analysis, making it more precise,
enabling more aggressive optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146610 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:49:11 +00:00
Jakob Stoklund Olesen
299b059cd6 Consider CPE alignment in CreateNewWater().
An aligned constant pool entry may require extra alignment padding where
the new water is created.  Take that into account when computing offset.

Also consider the alignment of other constant pool entries when
splitting a basic block.  Alignment padding may make it necessary to
move the split point higher.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:48:54 +00:00
Jim Grosbach
799ca9d1b7 ARM NEON better assembly operand range checking for lane indices of VLD/VST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:35:06 +00:00
Jim Grosbach
9b1b390288 ARM NEON VLD2/VST2 lane indexed assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146605 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:25:46 +00:00
Devang Patel
5211134fbd Do not sink instruction, if it is not profitable.
On ARM, peephole optimization for ABS creates a trivial cfg triangle which tempts machine sink to sink instructions in code which is really straight line code. Sometimes this sinking may alter register allocator input such that use and def of a reg is divided by a branch in between, which may result in extra spills. Now mahine sink avoids sinking if final sink destination is post dominator.

Radar 10266272.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146604 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 23:20:38 +00:00
Bill Wendling
69fdcd7f90 Reapply r146481 with a fix to create the Builder value in the correct place and
with the correct iterator.
<rdar://problem/10530851>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146600 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 22:45:33 +00:00
Kevin Enderby
c3fc3136a1 Improve the implementation of .incbin directive by replacing a loop by using
getStreamer().EmitBytes.  Suggestion by Benjamin Kramer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 22:34:45 +00:00
Andrew Trick
19154f4576 LSR: Fold redundant bitcasts on-the-fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 22:07:19 +00:00
Jim Grosbach
ec04a3f8db ARM NEON fix alignment encoding for VST2 w/ writeback.
Add tests for w/ writeback instruction parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 21:49:24 +00:00
Kevin Enderby
c55accaddb Add the .incbin directive which takes the binary data from a file and emits
it to the streamer.  rdar://10383898


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 21:47:48 +00:00
Jim Grosbach
2dbab5c33d Nuke old code. Missed in last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 21:41:32 +00:00
Jim Grosbach
bb3a2e4d0d ARM NEON refactor VST2 w/ writeback instructions.
In addition to improving the representation, this adds support for assembly
parsing of these instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 21:32:11 +00:00
Jim Grosbach
20accfc6c7 ARM NEON improve factoring a bit. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 20:59:15 +00:00
Evan Cheng
020f4106f8 Model ARM predicated write as read-mod-write. e.g.
r0 = mov #0
r0 = moveq #1

Then the second instruction has an implicit data dependency on the first
instruction. Sadly I have yet to come up with a small test case that
demonstrate the post-ra scheduler taking advantage of this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 20:00:08 +00:00
Jim Grosbach
e90ac9bce9 ARM NEON VST2 assembly parsing and encoding.
Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:35:22 +00:00
Stepan Dyatkovskiy
ac12ef4ad2 Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:19:17 +00:00
Dan Gohman
f9096e450b It turns out that clang does use pointer-to-function types to
point to ARC-managed pointers sometimes. This fixes rdar://10551239.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:10:53 +00:00
Jakob Stoklund Olesen
5e46dcbb4b Fix speling and 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:49:13 +00:00
Akira Hatanaka
3faac0a78c Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
emission is not supported yet, but a patch that adds the support should follow
soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:26:41 +00:00
Jim Grosbach
5dca1c9f63 Fix copy/pasto that skipped the 'modify' step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146571 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:12:37 +00:00
Jim Grosbach
4677708d4f ARM/Thumb2 mov vs. mvn alias goes both ways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146570 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:56:51 +00:00
Chad Rosier
6762f8f302 VFP2 is required for FP loads. Noticed by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:55:03 +00:00
Chad Rosier
64ac91b4b6 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:32:02 +00:00
Jim Grosbach
8d11c6349f ARM/Thumb2 'cmp rn, #imm' alias to cmn.
When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:30:24 +00:00
Chad Rosier
404ed3c223 Fix 80-column violation and extraneous brackets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:26:05 +00:00
NAKAMURA Takumi
d2cda5ce51 llvm/lib/CodeGen: Fix cmake build since r146542.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 03:50:53 +00:00
Eli Friedman
e6109828d7 Fix a stupid typo in MemDepPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:54:39 +00:00
Eli Friedman
e08db65c48 Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:28:54 +00:00
Evan Cheng
12dfdb424d Allow target to specify register output dependency. Still default to one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:28:53 +00:00
Bill Wendling
dbdc616ed5 Revert r146481 to review possible miscompilations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:18:26 +00:00
Bill Wendling
e08643be3a Disable to review some failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:16:54 +00:00
Jim Grosbach
a39cda7aff ARM assembler support for the target-specific .req directive.
rdar://10549683


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:16:11 +00:00
Evan Cheng
ddfd1377d2 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:11:42 +00:00
Nick Lewycky
798313d6c1 DW_AT_virtuality is also defined to be constant, not flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 00:56:07 +00:00
Chad Rosier
c6cff9daf4 Per discussion on the list, remove BitcodeVerify pass to reimplement as a free function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 00:29:31 +00:00
Kostya Serebryany
bd7910d158 [asan] remove .preinit_array from the compiler module (it breaks .so builds). This should be done in the run-time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 00:01:51 +00:00
Michael J. Spencer
5b08230930 Support/FileSystem: Add file_magic and move a vew clients over to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 23:17:12 +00:00
Michael J. Spencer
b92cb30cf5 Support/Program: Make Change<stream>ToBinary return error_code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 23:16:49 +00:00
Michael J. Spencer
faebf11a34 Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 23:16:15 +00:00
Jim Grosbach
863d2af947 Thumb2 assembler aliases for "mov(shifted register)"
rdar://10549767


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 22:45:11 +00:00
Jim Grosbach
27debd60a1 ARM LDM/STM system instruction variants.
rdar://10550269

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2011-12-13 21:48:29 +00:00
Jim Grosbach
b0659873e6 Thumb2 pre/post indexed stores can be from any non-PC GPR.
rdar://10549786

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2011-12-13 21:10:25 +00:00
Jim Grosbach
d7ea73a490 Thumb2 tweak for ccout handling in RSB parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 21:06:41 +00:00
Jim Grosbach
55b02f28c1 ARM thumb2 parsing of "rsb rd, rn, #0".
rdar://10549741


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2011-12-13 20:50:38 +00:00
Jim Grosbach
0f293de207 ARM NEON two-operand aliases for VQDMULH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:40:37 +00:00
Jim Grosbach
e91e7bcadc ARM pre-UAL NEG mnemonic for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:23:22 +00:00
Jim Grosbach
f10154010e ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:13:48 +00:00
Jim Grosbach
485d8bf7e5 ARM add more 'gas' compatibility aliases for NEON instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:08:32 +00:00
Kostya Serebryany
085cb8f0b9 [asan] report an error if blacklist file contains a malformed regex. fixes asan issue 17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 19:34:53 +00:00
Chad Rosier
8a9bce978f [fast-isel] Unaligned loads of floats are not supported. Therefore, convert to a regular
load and then move the result from a GPR to a FPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 19:22:14 +00:00
Chad Rosier
5bd83345c7 [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle
instructions that define aggregate types.

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2011-12-13 17:45:06 +00:00
Bill Wendling
4762f75251 Avoid using the 'insertvalue' instruction here.
Fast ISel isn't able to handle 'insertvalue' and it causes a large slowdown
during -O0 compilation. We don't necessarily need to generate an aggregate of
the values here if they're just going to be extracted directly afterwards.
<rdar://problem/10530851>


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2011-12-13 09:22:43 +00:00
Nick Lewycky
13aaca5edf DW_AT_accessibility is "constant" class, not form class, so it may not use
DW_FORM_flag. Use DW_FORM_data1 for one byte.


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2011-12-13 05:09:11 +00:00
Akira Hatanaka
044a784fa5 Expand .cprestore directive to multiple instructions if the offset does not fit
in a 16-bit field.


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2011-12-13 03:09:05 +00:00
Akira Hatanaka
f3315cf65f Relocation against a symbol, instead of against section. We had some extreme
test cases where there were a lot of relocations applied relative to a large
rodata section. Gas would create a symbol for each of these whereas we would
be relative to the beginning of the rodata section. This change mimics what
gas does.

Patch by Jack Carter.


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2011-12-13 02:27:40 +00:00
Chandler Carruth
63974b2144 Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

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2011-12-13 01:56:10 +00:00
Andrew Trick
d56ef8d709 Cleanup. Clarify LSRInstance public methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146459 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 00:55:33 +00:00
Jakob Stoklund Olesen
2e29024d2e Account for CPE alignment when searching for new water.
Constant pool entries with different alignment may cause more alignment
padding to be inserted. Compute the amount of padding needed, and try to
pick the location that requires the least amount of padding.

Also take the extra padding into account when the water is above the
use.

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2011-12-13 00:44:30 +00:00
NAKAMURA Takumi
e97b4990e1 Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 00:36:04 +00:00
Chad Rosier
f2a745efe5 [fast-isel] Guard "exhastive" fast-isel output with -fast-isel-verbose2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 00:05:11 +00:00
Chad Rosier
1619df0652 Add BitcodeVerifier.cpp to CMakeList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 23:11:26 +00:00
Nick Lewycky
bf47c76278 Fix unused value warning for value used only in assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:59:34 +00:00
Chad Rosier
b3025864e5 Begin sketching out a bitcode verifier pass. Idea is to emit a .bc file and
then read the file back in to verify use-list serialization/deserialization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:57:31 +00:00
Andrew Trick
86d34100cf Indvars: guard against exponential behavior in isHighCostExpansion.
This should always be done as a matter of principal. I don't have a
case that exposes the problem. I just noticed this recently while
scanning the code and realized I meant to fix it long ago.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:46:16 +00:00
Daniel Dunbar
b0c594fd42 LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

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2011-12-12 22:45:54 +00:00
Akira Hatanaka
6e55ff56b8 Emit B (unconditional branch) when -relocation-model=pic and J (jump) when
-relocation-model=static.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:39:35 +00:00
Akira Hatanaka
bfcb83fa32 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:38:19 +00:00
Pete Cooper
4777ebb767 Fixed register allocator splitting a live range on a spilling variable.
If we create new intervals for a variable that is being spilled, then those new intervals are not guaranteed to also spill.  This means that anything reading from the original spilling value might not get the correct value if spills were missed.

Fixes <rdar://problem/10546864>

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2011-12-12 22:16:27 +00:00
Tony Linthicum
22614a02eb fix warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:52:59 +00:00
Bob Wilson
9cd2b9562d Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
These modifiers simply select either the low or high D subregister of a Neon
Q register.  I've also removed the unimplemented 'p' modifier, which turns out
to be a bit different than the comment here suggests and as far as I can tell
was only intended for internal use in Apple's version of gcc.

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2011-12-12 21:45:15 +00:00
Tony Linthicum
b4b54153ad Hexagon backend support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:14:40 +00:00
Joerg Sonnenberger
127a669d09 Only replace fwrite with fputc, if the return value is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 20:18:31 +00:00
Daniel Dunbar
4ab406d7fc LLVMBuild: Remove trailing newline, which irked me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:48:00 +00:00
Dan Gohman
59a1c93e95 When computing reverse-CFG reverse-post-order, skip backedges, as
detected in the forward-CFG DFS. This prevents the reverse-CFG from
visiting blocks inside loops after blocks that dominate them in the
case where loops have multiple exits.

No testcase, because this fixes a bug which in practice only shows
up in a full optimizer run, due to the use-list order.

This fixes rdar://10422791 and others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:42:25 +00:00
Jan Sjödin
37e7ecf52b XOP instructions and encoding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:37:49 +00:00
Jakob Stoklund Olesen
8552821e57 Add a postOffset() alignment argument.
This computes the offset of the layout sucessor block, considering its
alignment as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:25:54 +00:00
Jakob Stoklund Olesen
bd1ec17caf Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:25:51 +00:00
Jan Sjödin
ebebe35d1c XOP encoding bits and logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:12:26 +00:00
Jakob Stoklund Olesen
cca33a3f24 Also set the proper alignment on inner islands and the function itself.
Downgrade the alignment of the initial constant island when constant
pool entries are moved elsewhere.

This is all gated by -arm-align-constant-islands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:45:45 +00:00
Dan Gohman
afee027766 Add a TODO comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:30:26 +00:00
Dan Gohman
62e5b4064b Fix a copy+pasto in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:20:00 +00:00
Dan Gohman
8a9eebe6b9 Use getArgOperand instead of getOperand on a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:19:12 +00:00
Dan Gohman
28588ff7aa Inline SetSeqToRelease into its only caller, since it's more clear that way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:16:56 +00:00
Jakob Stoklund Olesen
dbf350a5a8 Make MF a class member instead of passing it around everywhere.
Also add an MCP member pointing to the machine constant pool.

No functional change intended.

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2011-12-12 18:16:53 +00:00
Dan Gohman
2e68beb36a Fix omitted break statements in a switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:13:53 +00:00
Kostya Serebryany
9b02741d22 [asan] use .preinit_array only on linux
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 18:01:46 +00:00
Chad Rosier
7ae606a2a8 Revert r146363 to allow buildbots to make forward progress.
Original commit message:
Support/FileSystem: Implement canonicalize.


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2011-12-12 17:58:31 +00:00
Roman Divacky
a0c17a495b Add support for gnu_indirect_function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 17:34:04 +00:00
Jakob Stoklund Olesen
b813f924a7 Add a -arm-align-constant-islands flag, default off.
Order constant pool entries by descending alignment in the initial
island to ensure packing and correct alignment.  When the command line
flag is set, also align the basic block containing the constant pool
entries.

This is only a partial implementation of constant island alignment. More
to come.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 16:49:37 +00:00
Chandler Carruth
a56f5581ec Don't rely in there being one argument before we've actually identified
a function to upgrade. Also, simplify the code a bit at the expense of
one line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 10:57:20 +00:00
Michael J. Spencer
d45fbe6227 Support/FileSystem: Implement bool equivalent(file_status A, file_status B);
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 06:04:28 +00:00
Michael J. Spencer
c3b00e8040 Support/FileSystem: Implement canonicalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 06:04:01 +00:00
Michael J. Spencer
1dd2ee7bf4 Support/Windows: Cleanup scoped handles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 06:03:33 +00:00
Chandler Carruth
c4eab904c9 Teach the verifier to reject all non-constant arguments to the second
argument of the cttz and ctlz intrinsics.

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2011-12-12 04:36:02 +00:00
Chandler Carruth
ccbf1e36d3 Switch llvm.cttz and llvm.ctlz to accept a second i1 parameter which
indicates whether the intrinsic has a defined result for a first
argument equal to zero. This will eventually allow these intrinsics to
accurately model the semantics of GCC's __builtin_ctz and __builtin_clz
and the X86 instructions (prior to AVX) which implement them.

This patch merely sets the stage by extending the signature of these
intrinsics and establishing auto-upgrade logic so that the old spelling
still works both in IR and in bitcode. The upgrade logic preserves the
existing (inefficient) semantics. This patch should not change any
behavior. CodeGen isn't updated because it can use the existing
semantics regardless of the flag's value.

Note that this will be followed by API updates to Clang and DragonEgg.

Reviewed by Nick Lewycky!

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2011-12-12 04:26:04 +00:00
Dylan Noblesmith
9ea47179e6 ExecutionEngine: refactor interface
The OptLevel is now redundant with the TargetMachine*.
And selectTarget() isn't really JIT-specific and could probably
get refactored into one of the lower level libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146355 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 04:20:36 +00:00
Craig Topper
d93e4c3496 Remove some remants of the old palign pattern fragment that were still hanging around. Also remove a cast from inside getShuffleVPERM2X128Immediate and getShuffleVPERMILPImmediate since the only caller already had done the cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 19:12:35 +00:00
Stepan Dyatkovskiy
3e0dc0606a Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Third attempt: simplified checks in test for armv7-apple-darwin11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 14:35:48 +00:00
Benjamin Kramer
5eccf67492 Mips: Don't create a dangling IR function just to get the address of a symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 12:21:34 +00:00
Nick Lewycky
ead7448a85 Also remove unnecessary includes from this file, which was supposed to be part
of r146334!


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2011-12-11 00:45:13 +00:00
Nick Lewycky
531bb82556 Minimize #include's and forward-declares in Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 22:35:47 +00:00
Nick Lewycky
b3ffe102fe Refactor the implementation of the TargetOptions out of TargetMachine, taking
the only parts of TM that depends on CodeGen headers with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 22:34:41 +00:00
Chad Rosier
4552d3e22a [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disable while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 21:27:40 +00:00
Chad Rosier
d440f678fb Revert r146322 to appease buildbots. Original commit message:
Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for
FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second
attempt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 19:55:03 +00:00
Chad Rosier
b435aa2c1d Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146327 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 19:48:51 +00:00
Stepan Dyatkovskiy
8c0b807e8f Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 08:42:24 +00:00
Hal Finkel
fed4d19edd Make CR spill and restore use a reserved register. These operations cannot use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 04:50:53 +00:00
Jakob Stoklund Olesen
77caaf0fc0 Try to align the point where a large basic block is split.
The split point is picked such that the newly created water has the same
alignment as the function. This makes the island suitable for constant
pool entries with potentially higher alignment.

This also fixes an issue where the basic block was split one instruction
too late, causing nonconvergence of the algorithm.

<rdar://problem/10550705>

There is still an issue with correctly packing differently aligned
entries in the island.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146314 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:55:10 +00:00
Jakob Stoklund Olesen
2d5023bbcf More debug output formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:55:06 +00:00
Rafael Espindola
f3aefb56de Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas
does. The _GLOBAL_OFFSET_TABLE_ is still magical in that we get a R_386_GOTPC,
but it doesn't change the immediate in the same way as when the expression
has no right hand side symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:28:43 +00:00
Andrew Trick
fa1948a40f LSR: ignore strides in outer loops.
Since we're not rewriting IVs in other loops, there's not much reason
to consider their stride when generating formulae.
This should reduce the number of useless formulas considered by LSR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 00:25:00 +00:00
Jim Grosbach
48171e7fbe ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 00:01:02 +00:00