Commit Graph

33 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
a0112d0c39 Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 04:07:29 +00:00
Bruno Cardoso Lopes
54ad87ab78 Add a few ARM coprocessor intrinsics. Testcases included
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 17:29:22 +00:00
Bob Wilson
8be7d8b43c Revert a minor comment change inadvertently included with r128502.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128526 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 05:26:51 +00:00
Evan Cheng
92e3916c3b Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends
was lowering them to sext / uxt + mul instructions. Unfortunately the
optimization passes may hoist the extensions out of the loop and separate them.
When that happens, the long multiplication instructions can be broken into
several scalar instructions, causing significant performance issue.

Note the vmla and vmls intrinsics are not added back. Frontend will codegen them
as intrinsics vmull* + add / sub. Also note the isel optimizations for catching
mul + sext / zext are not changed either.

First part of rdar://8832507, rdar://9203134


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 23:06:19 +00:00
Che-Liang Chiou
0df2c50c2b ptx: add basic intrinsic support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 14:17:37 +00:00
Bob Wilson
0406356cd4 Add Neon VCVT instructions for f32 <-> f16 conversions.
Clang is now providing intrinsics for these and so we need to support them
in the backend.  Radar 8068427.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:14:12 +00:00
Bob Wilson
eb0c3d3729 Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the
vabd intrinsic and add and/or zext operations.  In the case of vaba, this
also avoids the need for a DAG combine pattern to combine vabd with add.
Update tests.  Auto-upgrade the old intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:35:08 +00:00
Bob Wilson
d0b69cf119 Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,
add, and subtract operations with zero-extended or sign-extended vectors.
Update tests.  Add auto-upgrade support for the old intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 23:50:19 +00:00
Bob Wilson
973a074345 Remove NEON vmovn intrinsic, replacing it with vector truncate operations.
Auto-upgrade the old intrinsic and update tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-30 20:02:30 +00:00
Bob Wilson
04d6c289ab Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm
IR add/sub operations with one or both operands sign- or zero-extended.
Auto-upgrade the old intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112416 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29 05:57:34 +00:00
Bob Wilson
7a9ef44b3b Add alignment arguments to all the NEON load/store intrinsics.
Update all the tests using those intrinsics and add support for
auto-upgrading bitcode files with the old versions of the intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 17:13:24 +00:00
Bob Wilson
b31a11b466 Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and
zero-extend operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 04:54:02 +00:00
Dan Gohman
7365c091f9 Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
to IntrReadWriteArgMem, as it's for reading as well as writing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:36:21 +00:00
Nate Begeman
d1fb583128 Add support for getting & setting the FPSCR application register on ARM when VFP is enabled.
Add support for using the FPSCR in conjunction with the vcvtr instruction, for controlling fp to int rounding.
Add support for the FLT_ROUNDS_ node now that the FPSCR is exposed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-03 21:31:55 +00:00
Nate Begeman
0e0a20eb38 Add builtins for ssat/usat, similar to RealView's __ssat and __usat intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109813 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-29 22:48:09 +00:00
Nate Begeman
692433bc2d Add intrinsics __builtin_arm_qadd & __builtin_arm_qsub to allow access to the QADD & QSUB instructions.
Behave identically to __qadd & __qsub RealView instruction intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109770 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-29 17:56:55 +00:00
Chris Lattner
ae8f4c4f86 [llvm_void_ty] is no longer needed for result types,
just use an empty result list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23 23:46:07 +00:00
Bob Wilson
b8b85cfd4d Add new intrinsics for Neon vldN_lane and vstN_lane operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 02:28:46 +00:00
Bob Wilson
d4b4cf524b Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 00:01:42 +00:00
Bob Wilson
394346ba3a Add some comments to clarify the arguments to the vtbl and vtbx intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 01:48:30 +00:00
Bob Wilson
b0abb4dc42 Use vAny type to get rid of Neon intrinsics that differed only in whether
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 05:39:44 +00:00
Bob Wilson
f24bd401eb Use new EVT::vAny type to combine Neon intrinsics for VPADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 01:15:26 +00:00
Bob Wilson
1ff446fef6 Change Neon table lookup (VTBL) and table extension (VTBX) intrinsics to
take the table vectors as separate arguments, instead of the previous
approach where they were combined into one big vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78525 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 06:03:09 +00:00
Bob Wilson
9e699cc726 Add new intrinsics for Neon VTRN, VZIP and VUZP operations. Modeling these
as vector shuffles did not work out well.  Shuffles that produce double-wide
vectors accurately represent the operation but make it hard to do anything
with the results.  I considered splitting them up into 2 shuffles, one to
write each register separately, but there doesn't seem to be a good way to
reunite them for codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78437 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:53:05 +00:00
Bob Wilson
b7d0c90c44 Change Neon VLDn intrinsics to return multiple values instead of really
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 16:39:22 +00:00
Bob Wilson
cd8eb8b60a Change NEON vldN/vstN intrinsics to specify "N" as an immediate operand
instead of having a separate intrinsic for each value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 22:27:20 +00:00
Bob Wilson
ff0d3392e0 Add missing argument for vtbx intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74340 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:27:22 +00:00
Bob Wilson
fd6d87d68a Add intrinsics for ARM NEON vtbl and vtbx operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 21:45:05 +00:00
Bob Wilson
4dbbfe3571 Swap order of arguments to vst[34]* intrinsics. This matches the order
used by both the user-visible intrinsics defined by ARM and the
corresponding GCC builtins.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:23:29 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 23:27:02 +00:00
Bill Wendling
cdcc3e6e12 Modify the intrinsics pattern to separate out the "return" types from the
"parameter" types. An intrinsic can now return a multiple return values like
this:

  def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
                                    [LLVMMatchType<0>, LLVMMatchType<0>]>;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 09:08:33 +00:00
Chris Lattner
234d529e58 remove attribution from a variety of miscellaneous files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45425 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 22:59:10 +00:00
Lauro Ramos Venancio
e0cb36b9fb [ARM] Implement __builtin_thread_pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-08 17:20:05 +00:00