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3965 Commits

Author SHA1 Message Date
Reid Spencer
a1aad3b0ed Shut GCC 4.0 up about classes that have virtual functions but a non-virtual 
destructor. Just add the do-nothing virtual destructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21524 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-25 02:55:55 +00:00
Misha Brukman
27177f8c16 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21457 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 18:06:01 +00:00
Misha Brukman
7847fcac17 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 17:54:37 +00:00
Reid Spencer
18969fbc9f Implement the --enable-targets= feature of the configure script. The make 
variable TARGETS_TO_BUILD is used to determine which targets in lib/Target
are built and which libraries are linked into llc. This effectively
implements the feature. One item remains: disabling targets in the dejagnu
test suite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21450 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 17:20:11 +00:00
Andrew Lenharth
500b4dba32 keep track of max depth stats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21446 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 13:35:18 +00:00
Tanya Lattner
9f83822565 Updated dependence analyzer. Fixed numerous bugs. Same stage scheduling, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21444 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 06:32:48 +00:00
Misha Brukman
0e0a7a45d3 * Remove trailing whitespace 
* Convert tabs to spaces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:38:14 +00:00
Misha Brukman
b5f662fa03 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:30:14 +00:00
Misha Brukman
4633f1cde8 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21424 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:13:11 +00:00
Misha Brukman
f976c856fc Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21422 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 22:55:34 +00:00
Chris Lattner
837a521c48 Match another form of eqv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21413 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 21:09:11 +00:00
Chris Lattner
109026290b Handle stores of global address as stores of immediates. Instead of: 
test1:
        movl $N, %eax
        movl %eax, G
        ret

emit:

test1:
        movl $N, G
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21407 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 19:11:03 +00:00
Chris Lattner
75f354bd7a Handle (store &GV -> mem) as a store immediate. This often occurs for 
printf format strings and other stuff.  Instead of generating this:

        movl $l1__2E_str_1, %eax
        movl %eax, (%esp)

we now emit:

        movl $l1__2E_str_1, (%esp)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21406 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 19:03:24 +00:00
Misha Brukman
d6a29a5304 Remove trailing whitespace, patch by Markus Oberhumer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21379 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-20 16:05:03 +00:00
Chris Lattner
f577c6122f Add completely untested support for mtcrf/mfcrf encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21353 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:41:52 +00:00
Chris Lattner
14522e31d9 switch over the rest of the formats that use RC to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21352 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:21:30 +00:00
Chris Lattner
883059fb58 Convert the XForm instrs and XSForm instruction over to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21351 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:15:18 +00:00
Chris Lattner
97a2d42999 Now that the ppc64 and vmx operands of I are always 0, forward substitute 
them away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21350 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:05:22 +00:00
Chris Lattner
a611ab72ca convert over bform and iform instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21349 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:00:59 +00:00
Chris Lattner
57226fbc7b Convert over DForm and DSForm instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21348 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:59:28 +00:00
Chris Lattner
e19d0b1130 Convert XLForm and XForm instructions over to use PPC64 when appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21347 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:51:30 +00:00
Chris Lattner
5035cef732 Convert XO XS and XFX forms to use isPPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21346 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:40:07 +00:00
Chris Lattner
0bdc6f1fd4 Turn PPC64 and VMX into classes that can be added to instructions instead of 
bits that must be passed up the inheritance hierarchy.  Convert MForm and AForm
instructions over


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21345 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:32:54 +00:00
Nate Begeman
1cbf3abbb8 Next round of PPC CR optimizations. For the following code: 
int %bar(float %a, float %b, float %c, float %d) {
entry:
    %tmp.1 = setlt float %a, %d
    %tmp.2 = setlt float %b, %d
    %or = or bool %tmp.1, %tmp.2
    %tmp.3 = setgt float %c, %d
    %tmp.4 = or bool %or, %tmp.3
    %tmp.5 = and bool %tmp.4, true
    %retval = cast bool %tmp.5 to int
    ret int %retval
}

We now emit:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr0, f1, f4
        fcmpu cr1, f2, f4
        cror 0, 0, 4
        fcmpu cr1, f3, f4
        cror 28, 0, 5
        mfcr r2
        rlwinm r3, r2, 29, 31, 31
        blr

Instead of:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr7, f1, f4
        mfcr r2
        rlwinm r2, r2, 29, 31, 31
        fcmpu cr7, f2, f4
        mfcr r3
        rlwinm r3, r3, 29, 31, 31
        or r2, r2, r3
        fcmpu cr7, f3, f4
        mfcr r3
        rlwinm r3, r3, 30, 31, 31
        or r3, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21321 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 07:48:09 +00:00
Nate Begeman
16ac709c63 Change codegen for setcc to read the bit directly out of the condition 
register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 02:43:24 +00:00
Chris Lattner
477d1de9b2 Handle ExternalSymbol operands in the PPC JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21312 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 00:46:10 +00:00
Nate Begeman
f8b02949e3 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 22:12:16 +00:00
Andrew Lenharth
1e0d9bda62 fix calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21303 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 17:34:20 +00:00
Andrew Lenharth
3ae1829fe5 a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21302 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 16:24:00 +00:00
Duraid Madina
1ce0c015ad print negative 64 bit immediates as negative numbers, makes things a little 
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:08:01 +00:00
Duraid Madina
3eb7150c3e oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21299 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:06:35 +00:00
Nate Begeman
7bfba7d5e3 Implement multi-way branches through logical ops on condition registers. 
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 09:45:08 +00:00
Duraid Madina
c4ccc2db6b we have zextloads, not sextloads! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21296 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 08:37:32 +00:00
Nate Begeman
ef7288c824 Add the necessary support to codegen condition register logical ops with 
register allocated condition registers.  Make sure that the printed
  output is gas compatible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 03:20:38 +00:00
Nate Begeman
1b7f7fbf95 Start allocating condition registers. Almost all explicit uses of CR0 are 
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 23:15:44 +00:00
Nate Begeman
3664ceffdd Implement the fold shift X, zext(Y) -> shift X, Y at the target level, 
where it is safe to do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 22:14:14 +00:00
Nate Begeman
eea805e74c Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 21:23:31 +00:00
Andrew Lenharth
c24b537399 WOW, function calls still seem to work after this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21286 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 17:17:28 +00:00
Andrew Lenharth
556c44e116 prepare for func call optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21285 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 16:19:50 +00:00
Duraid Madina
ed09502a0b * add the shladd instruction 
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 06:12:04 +00:00
Andrew Lenharth
4f7cba5af8 add matches for SxADDL and company, as well as simplify the SxADDQ code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21281 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 05:19:55 +00:00
Duraid Madina
c02780eed1 * if ANDing with a constant of the form: 
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 04:50:54 +00:00
Andrew Lenharth
483f22d817 added all flavors of zap for anding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21276 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:47:03 +00:00
Chris Lattner
5bf2686a1b Fix some mysteriously missing {}'s which cause the miscompilation of 
Olden/mst, Ptrdist/bc, Obsequi, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21274 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:29:53 +00:00
Chris Lattner
519f40ba4e remove one more occurance of this that snuck in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:46:17 +00:00
Chris Lattner
2942e9c301 Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff 
like this:

        ldah $1,1($31)
        lda $1,-1($1)
        and $0,$1,$24

instead of this:

        zap $0,252,$24

To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21270 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:43:40 +00:00
Chris Lattner
6ac614a4f2 Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing 
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:41:52 +00:00
Chris Lattner
c951d87fe9 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:40:26 +00:00
Chris Lattner
91302a10ae Z_E_I is gone 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21267 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:39:05 +00:00
Nate Begeman
b882752bd0 Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:12:17 +00:00