Commit Graph

497 Commits

Author SHA1 Message Date
Bill Wendling
ab55ebda1c Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12 00:56:36 +00:00
Bill Wendling
775bb805c5 Clarify FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11 01:26:44 +00:00
Mon P Wang
a60b5236c1 Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11 00:26:16 +00:00
Bill Wendling
2476e5d345 If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 22:36:00 +00:00
Mon P Wang
bae527d949 Fixed a bug when trying to optimize a extract vector element of a
bit convert that changes the number of elements of a shuffle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 03:59:02 +00:00
Dale Johannesen
34d7985927 One more transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60432 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 18:40:40 +00:00
Dale Johannesen
221cd2f081 Add a few more transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60391 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-02 01:30:54 +00:00
Dale Johannesen
56eca9103e Add a missing case in visitADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60137 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-27 00:43:21 +00:00
Duncan Sands
25cf2275ff If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 14:53:14 +00:00
Duncan Sands
03228089d5 Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23 15:47:28 +00:00
Bill Wendling
8ac0d4b4fb - Move conversion of [SU]ADDO from DAG combiner into legalizer.
- Add "promote integer type" stuff to the legalizer for these nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59847 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22 00:22:52 +00:00
Bill Wendling
137dccd5d8 Default to converting UADDO to the generic form that SADDO is converted to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59801 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 07:44:30 +00:00
Bill Wendling
6c63f62729 Remove chains. Unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59783 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 02:22:59 +00:00
Bill Wendling
1c55a9c0cc Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"
because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 02:12:42 +00:00
Bill Wendling
7cdc3c8ad2 Implement the sadd_with_overflow intrinsic. This is converted into
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 02:03:52 +00:00
Bill Wendling
ae89bb1443 Fix for PR3040:
The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59035 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 08:25:46 +00:00
Mon P Wang
aeb06d2462 Added support for the following definition of shufflevector
<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 04:46:22 +00:00
Evan Cheng
3eb57d5439 Type of shuffle mask has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58751 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 06:04:18 +00:00
Chris Lattner
6e1c6231ba Don't produce invalid comparisons after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58320 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 07:11:07 +00:00
Duncan Sands
94989acaab Use a legal integer type for vector shuffle mask
elements.  Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19 14:58:05 +00:00
Dan Gohman
6520e20e4f Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
Dan Gohman
74feef261a Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.

Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.

Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.

These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 01:23:35 +00:00
Evan Cheng
0329466b6b Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 21:26:46 +00:00
Dale Johannesen
7111b02c73 Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does.  No functional
change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 18:53:47 +00:00
Dan Gohman
7810bfed55 Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 21:54:37 +00:00
Bill Wendling
f3cbca279d Reapplying r56550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 10:25:02 +00:00
Eric Christopher
83e05c48de Temporarily revert r56550 until missing commit can be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 08:30:44 +00:00
Bill Wendling
df0c7bc52d Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 07:11:26 +00:00
Evan Cheng
242ebd145d Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 18:19:24 +00:00
Dan Gohman
4fbd796a12 Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 18:08:03 +00:00
Dan Gohman
f5aeb1a8e4 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Dan Gohman
942ca7f808 In visitUREM, arrange for the temporary UDIV node to be
revisited, consistent with the code in visitSREM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:59:01 +00:00
Bill Wendling
9a0d1ba051 Revert my previous change -- the subtraction of two constants was a no-op
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 01:56:32 +00:00
Bill Wendling
ca460d5a39 Convert
// fold (sub c1, c2) -> c1-c2

from a no-op into an actual transformation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07 11:34:47 +00:00
Dan Gohman
3dd168d445 Fix a search+replace-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 01:58:21 +00:00
Dan Gohman
6448d91ad1 Clean up uses of TargetLowering::getTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 15:39:15 +00:00
Bill Wendling
2692d59574 Another situation where ROTR is cheaper than ROTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:13:31 +00:00
Bill Wendling
353dea2f0a For this pattern, ROTR is the cheaper option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:04:56 +00:00
Bill Wendling
c5cbda12e9 - Fix comment so that it describes how the code really works:
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotl x, y)
   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotr x, (sub 32, y))

Example: (x == 0xDEADBEEF and y == 4)

    (x << 4) | (x >> 28)
 => 0xEADBEEF0 | 0x0000000D
 => 0xEADBEEFD

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => 0xEADBEEFD

- Fix comment and code for second version. It wasn't using the rot* propertly.

   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> 
   //   (rotr x, y)
   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
   //   (rotl x, (sub 32, y))

    (x << 28) | (x >> 4)
 => 0xD0000000 | 0x0DEADBEE
 => 0xDDEADBEE

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => (0xEADBEEFD)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 00:37:27 +00:00
Gabor Greif
12632d2222 fix some 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 19:29:20 +00:00
Evan Cheng
eb9f89287e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 02:03:58 +00:00
Evan Cheng
4529966d99 Fix 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:20:46 +00:00
Evan Cheng
17a568b668 Back out 55498. It broken Apple style bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:21:44 +00:00
Gabor Greif
ba36cb5242 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Dan Gohman
a3f8b7a4ce Optimize DAGCombiner's worklist processing. Previously it started
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:01:56 +00:00
Gabor Greif
99a6cb92d1 disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 22:36:50 +00:00
Dan Gohman
a267651b7e Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 16:30:28 +00:00
Dan Gohman
7f8613e5b8 Improve support for vector casts in LLVM IR and CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 20:04:46 +00:00
Dan Gohman
8cea8ff34c Take the FrameOffset into account when computing the alignment
of stack objects. This fixes PR2656.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 18:27:03 +00:00
Dan Gohman
75dcf08243 Improve dagcombining for sext-loads and sext-in-reg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 00:50:31 +00:00