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1010 Commits

Author SHA1 Message Date
Matt Arsenault
3cd8cf6bbd R600/SI: Add FP mode bits to binary. 
The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-26 17:22:30 +00:00
Aaron Ballman
2711c0a68b Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211783 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-26 13:45:47 +00:00
Matt Arsenault
b0f5a0e7e7 R600: Fix vector FMA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211757 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-26 01:28:05 +00:00
Tom Stellard
11580ee62d R600/SI: Use a ComplexPattern for MUBUF stores 
Now that non-leaf ComplexPatterns are allowed we can fold all the MUBUF
store patterns into the instruction definition.  We will also be able to
reuse this new ComplexPattern for MUBUF loads and atomic operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211644 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-24 23:33:07 +00:00
Tom Stellard
78d1e95201 R600: Promote i64 stores to v2i32 
Now we need only one 64-bit pattern for stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211643 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-24 23:33:04 +00:00
Matt Arsenault
95eb45c5d9 R600: Fix inconsistency in rsq instructions. 
R600 was using a clamped version of rsq, but SI was not. Add a
new rsq_clamped intrinsic and use them consistently.

It's unclear to me from the documentation what behavior
the R600 instructions have, so I assume they have the legacy behavior
described by the SI documents. For R600, use RECIPSQRT_IEEE
for both llvm.AMDGPU.rsq.legacy and llvm.AMDGPU.rsq. R600 also
has RECIPSQRT_FF, which I'm not sure how it fits in here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211637 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-24 22:13:39 +00:00
Matt Arsenault
a91ff54e43 R600: Remove DIV_INF 
This corresponded to an amdil instruction which there is
a 2 instruction equivalent for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211616 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-24 17:42:16 +00:00
Matt Arsenault
26da337208 R600/SI: Move pattern to instruction definition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211614 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-24 17:17:06 +00:00
Matt Arsenault
140c6ae970 R600/SI: Verify restrictions on div_scale operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211524 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:28:31 +00:00
Matt Arsenault
ed143b7c0c R600/SI: Fix div_scale intrinsic. 
The operand that must match one of the others does matter,
and implement selecting for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211523 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:28:28 +00:00
Matt Arsenault
791c054391 R600: Remove AMDILISelLowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211519 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:55 +00:00
Matt Arsenault
6272302394 R600: Select is not expensive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211518 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:52 +00:00
Matt Arsenault
9ad2c7ef92 R600: Move add/sub with overflow out of AMDILISelLowering 
Add more tests for these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211517 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:49 +00:00
Matt Arsenault
5f607c0b39 R600: Move more out of AMDILISelLowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211516 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:44 +00:00
Matt Arsenault
a12b356464 R600: Don't set fp_round_inreg action. 
There's no point in setting this since it seems to only
by created in 1 place for ppcf128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211515 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:41 +00:00
Matt Arsenault
c4471e9248 R600/SI: Handle i64 sub. 
We can handle it the same way as add

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211514 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:38 +00:00
Matt Arsenault
e564b6ed79 R600/SI: Move selection of i64 add to separate function. 
Also don't use a SmallVector for fixed size array.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211513 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:34 +00:00
Matt Arsenault
b170a8042a R600: Rename AMDIL file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211512 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:31 +00:00
Matt Arsenault
cf88d40c8a Fix missing words in sentence 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211511 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:26 +00:00
Matt Arsenault
261698fbd5 Use helper function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211510 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:24 +00:00
Matt Arsenault
1f93cf49fc Alphabetize forward declarations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211509 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-23 18:00:20 +00:00
Jan Vesely
ddf2a7902a R600: Use LowerSDIVREM for i64 node replace 
v2: move div/rem node replacement to R600ISelLowering
    make lowerSDIVREM protected

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211478 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-22 21:43:01 +00:00
Jan Vesely
cd88535ab9 R600: Implement custom SDIVREM. 
Instead of separate SDIV/SREM. SDIV used UDIV which in turn used UDIVREM anyway.
SREM used SDIV(UDIV->UDIVREM)+MUL+SUB, using UDIVREM directly is more efficient.

v2: Don't use all caps names

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211477 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-22 21:43:00 +00:00
Tom Stellard
c0bf939e80 R600/SI: Add patterns for ctpop inside a branch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211378 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:06:11 +00:00
Tom Stellard
61d64acd0c R600/SI: Add a pattern for f32 ftrunc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211377 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:06:09 +00:00
Tom Stellard
2cda6e8ca6 R600: Expand vector flog2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211376 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:06:07 +00:00
Tom Stellard
2d245e2da4 R600: Expand vector fexp2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211375 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:06:05 +00:00
Tom Stellard
98b0736565 R600/SI: SI Control Flow Annotation bug fixed 
Mixing of AddAvailableValue and GetValueAtEndOfBlock methods of SSAUpdater
leaded to the endless loop generation when the nested loops annotated.

This fixes a bug in the OCL_ML/KNN OpenCV test.  The test case is too
complex for FileCheck and would be very fragile.

Patch by: Elena Denisova

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211374 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:06:02 +00:00
Tom Stellard
538c95179c R600/SI: Add a VALU pattern for i64 xor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211373 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 17:05:57 +00:00
Matt Arsenault
7d1f7798db R600: Trivial subtarget feature cleanups. 
Remove an unused AMDIL leftover, correct extra periods
appearing in the help menu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211341 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-20 06:50:05 +00:00
Alp Toker
d06976aba7 Fix typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211304 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-19 19:41:26 +00:00
Craig Topper
bd01df2487 Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211254 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-19 06:10:58 +00:00
Matt Arsenault
d9b35435b8 R600/SI: Add intrinsics for various math instructions. 
These will be used for custom lowering and for library
implementations of various math functions, so it's useful
to expose these as builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211247 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-19 01:19:19 +00:00
Matt Arsenault
2ea6d93c5e Use stdint macros for specifying size of constants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211231 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 22:11:03 +00:00
Matt Arsenault
ce09bda96e R600: Handle fnearbyint 
The difference from rint isn't really relevant here,
so treat them as equivalent. OpenCL doesn't have nearbyint,
so this is sort of pointless other than for completeness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211229 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 22:03:45 +00:00
Marek Olsak
f286d63757 R600/SI: add gather4 and getlod intrinsics (v3) 
This contains all the previous patches + getlod support on top of it.
It doesn't use SDNodes anymore, so it's quite small.
It also adds v16i8 to SReg_128, which is used for the sampler descriptor.

Reviewed-by: Tom Stellard

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211228 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 22:00:29 +00:00
Matt Arsenault
311ea12506 Use LL suffix for literal that should be 64-bits. 
This hopefully fixes Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211225 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 21:40:43 +00:00
Jan Vesely
52b6c2d6ef R600: Expand vector fceil 
Move fp64 fceil tests to fceil64.ll

v2: rebase

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211194 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:57:29 +00:00
Matt Arsenault
4380c61415 Work around ridiculous warning. 
Apparently C++ doesn't really have hex floating point constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211192 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:45:58 +00:00
Matt Arsenault
2b6e6fc1a8 R600/SI: Add intrinsics for brev instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211187 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:13:57 +00:00
Matt Arsenault
795ae8615f R600/SI: Prettier operand printing for 64-bit ops. 
Copy what is done for 32-bit already so the order is about the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211186 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:13:51 +00:00
Matt Arsenault
debd831223 R600: Implement f64 ftrunc, ffloor and fceil. 
CI has instructions for these, so this fixes them for older hardware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211183 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:05:30 +00:00
Matt Arsenault
a5395c03f0 R600: Custom lower f64 frint for pre-CI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211182 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:05:26 +00:00
Matt Arsenault
f7aa5f9379 R600/SI: Temporary fix for f64 fneg 
This should be a source modifier, but this unblocks
most of my math patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211181 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 17:05:22 +00:00
Matt Arsenault
3de1bed8f4 R600/SI: Comparisons set vcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211178 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 16:53:48 +00:00
Jan Vesely
c32d52df24 R600: Implement 64bit SRA 
v2: Use capitalized variable name

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211159 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 12:27:17 +00:00
Jan Vesely
2d06e73d88 R600: Implement 64bit SRL 
v2: use C++ style comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211158 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 12:27:15 +00:00
Jan Vesely
a64058f3eb R600: Implement 64bit SHL 
v2: Use c++ style comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211157 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-18 12:27:13 +00:00
Tom Stellard
540fe7f20e R600/SI: Make sure target flags are set on pseudo VOP3 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211120 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-17 19:34:46 +00:00
Matt Arsenault
3f1f259c22 R600/SI: Match cttz_zero_undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211116 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-06-17 17:36:27 +00:00