Matt Arsenault 795ae8615f R600/SI: Prettier operand printing for 64-bit ops. ... Copy what is done for 32-bit already so the order is about the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211186 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-18 17:13:51 +00:00
..
InstPrinter	R600/SI: Prettier display of input modifiers	2014-05-10 19:18:33 +00:00
MCTargetDesc
TargetInfo
AMDGPU.h	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPU.td	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPUAsmPrinter.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td	R600/SI: allow 5 more input SGPRs to a shader	2014-05-05 19:30:54 +00:00
AMDGPUFrameLowering.cpp	Fix typo	2014-06-14 04:26:07 +00:00
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
AMDGPUInstrInfo.h	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
AMDGPUInstrInfo.td	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
AMDGPUInstructions.td	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
AMDGPUIntrinsics.td	R600/SI: Add a pattern for llvm.AMDGPU.barrier.global	2014-06-17 16:53:09 +00:00
AMDGPUISelDAGToDAG.cpp	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPUISelLowering.cpp	R600: Implement f64 ftrunc, ffloor and fceil.	2014-06-18 17:05:30 +00:00
AMDGPUISelLowering.h	R600: Implement f64 ftrunc, ffloor and fceil.	2014-06-18 17:05:30 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
AMDGPUMCInstLower.h	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
AMDGPUPromoteAlloca.cpp	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPURegisterInfo.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
AMDGPURegisterInfo.h	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPUSubtarget.h	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPUTargetMachine.cpp	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
AMDGPUTargetMachine.h	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILISelLowering.cpp	R600: Remove a few more things from AMDILISelLowering	2014-06-15 21:08:58 +00:00
CaymanInstructions.td	R600: Expand mul24 for GPUs without it	2014-05-22 18:00:24 +00:00
CMakeLists.txt	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
EvergreenInstructions.td	R600/SI: Add a pattern for llvm.AMDGPU.barrier.global	2014-06-17 16:53:09 +00:00
LLVMBuild.txt
Makefile
Processors.td	R600/SI: Add processor type for Mullins.	2014-05-02 15:41:49 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
R600InstrInfo.h	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
R600Instructions.td	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Implement 64bit SRA	2014-06-18 12:27:17 +00:00
R600ISelLowering.h	R600: Implement 64bit SRL	2014-06-18 12:27:15 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
R600RegisterInfo.cpp	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
R600RegisterInfo.h	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
R600RegisterInfo.td	R600: Use LDS and vectors for private memory	2014-06-17 16:53:14 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp	R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies	2014-05-15 14:41:55 +00:00
SIInsertWaits.cpp
SIInstrFormats.td	R600/SI: Make sure target flags are set on pseudo VOP3 instructions	2014-06-17 19:34:46 +00:00
SIInstrInfo.cpp	R600/SI: Match cttz_zero_undef	2014-06-17 17:36:27 +00:00
SIInstrInfo.h	R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget	2014-06-13 01:32:00 +00:00
SIInstrInfo.td	R600/SI: Prettier operand printing for 64-bit ops.	2014-06-18 17:13:51 +00:00
SIInstructions.td	R600/SI: Comparisons set vcc.	2014-06-18 16:53:48 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Prettier operand printing for 64-bit ops.	2014-06-18 17:13:51 +00:00
SIISelLowering.h	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
SILowerControlFlow.cpp	R600/SI: Re-initialize the m0 register after using it for indirect addressing	2014-06-17 16:53:04 +00:00
SILowerI1Copies.cpp	R600/SI: Use VALU instructions for i1 ops	2014-05-15 14:41:50 +00:00
SIMachineFunctionInfo.cpp	R600/SI: Only create one instruction when spilling/restoring register v3	2014-05-02 15:41:42 +00:00
SIMachineFunctionInfo.h	R600/SI: Only create one instruction when spilling/restoring register v3	2014-05-02 15:41:42 +00:00
SIRegisterInfo.cpp	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
SIRegisterInfo.h	R600: Remove AMDIL instruction and register definitions	2014-06-13 16:38:59 +00:00
SIRegisterInfo.td
SISchedule.td
SITypeRewriter.cpp