- This is a simplified mechanism which just looks up a target based on the
target triple, with a few additional flags.
- Remove getClosestStaticTargetForModule, the moral equivalent is now:
lookupTarget(Mod->getTargetTriple, true, false, ...);
- This no longer does the fuzzy matching with target data (based on endianness
and pointer width) that getClosestStaticTargetForModule was doing, but this
was deemed unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77111 91177308-0d34-0410-b5e6-96231b3b80d8
for now. Make the section switching directives more consistent
by not including \n and including \t for them all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77107 91177308-0d34-0410-b5e6-96231b3b80d8
and make it more aggressive, we now put:
const int G2 __attribute__((weak)) = 42;
into the text (readonly) segment like gcc, previously we put
it into the data (readwrite) segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77104 91177308-0d34-0410-b5e6-96231b3b80d8
- Split into a separate patch because there is a slight functionality change,
it is no longer valid to call setName(0), which was equivalent to
setName(""). I'm hoping no one depends on this...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77099 91177308-0d34-0410-b5e6-96231b3b80d8
1. Spell SectionFlags::Writeable as "Writable".
2. Add predicates for deriving SectionFlags from SectionKinds.
3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into
ELFTargetAsmInfo.
4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the
BSS bit set (the real fix for PR4619).
5. Fix isSuitableForBSS to not put globals with explicit sections
set in BSS (which was the reason #4 wasn't fixed earlier).
6. Remove my previous hack for PR4619.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77085 91177308-0d34-0410-b5e6-96231b3b80d8
the step value as unsigned, the start value and the addrec
itself still need to be treated as signed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77078 91177308-0d34-0410-b5e6-96231b3b80d8
- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77060 91177308-0d34-0410-b5e6-96231b3b80d8
on darwin with ".cstring" instead of ".section __TEXT,__cstring". They
are the same and the former is better. Remove this because this is no longer
magic pixie dust in the frontend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77055 91177308-0d34-0410-b5e6-96231b3b80d8
- The only meat here is in Value.{h,cpp} the rest is essential 'const
std::string &' -> 'const Twine &'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77048 91177308-0d34-0410-b5e6-96231b3b80d8
affected after a PHI node has been analyzed, just remove affected
SCEVs from the Scalars map, so that they'll be (lazily) recreated as
needed. This avoids creating SCEV objects that aren't actually needed.
Also, rewrite the associated def-use walking code to be non-recursive
and to continue traversing past Instructions that don't have an
entry in the Scalars map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77032 91177308-0d34-0410-b5e6-96231b3b80d8
Before:
adr r12, #LJTI3_0_0
ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
.long LBB3_24
.long LBB3_30
.long LBB3_31
.long LBB3_32
After:
adr r12, #LJTI3_0_0
add pc, r12, +r0, lsl #2
LJTI3_0_0:
b.w LBB3_24
b.w LBB3_30
b.w LBB3_31
b.w LBB3_32
This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
(smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
won't have to over-estimate the size.
Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8