laid out closer to the VM so that calls to library functions (e.g. puts()) and
callback (e.g. JITResolver::CompilationCallback) fit into 30 bits of the call
instruction.
* Abort if architecture is not yet supported (not X86 or Sparc) because it
likely requires a different set of parameters to mmap() .
* Stop using hard-coded values for page size; use sysconf(_SC_PAGESIZE) instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6610 91177308-0d34-0410-b5e6-96231b3b80d8
the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8
-- added new targets %.trace-out-llc and %.trace-out-cbe
-- either TRACE=yes or TRACEM=yes is still needed and chooses how to trace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6585 91177308-0d34-0410-b5e6-96231b3b80d8
* Document the MOTy namespace correctly for doxygen
* Eliminate usage of the MachineOpCode typedef, which should eventually
be eliminated entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6584 91177308-0d34-0410-b5e6-96231b3b80d8
* LLVM #include should use "", not <>
* Fix line wrapping
* Remove noncopyable base class to improve doxygen output
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rewriting it. I also vacuumed out all the commented-out code and
inaccurate comments, etc.
(We need to put the mapping information in a data structure so that we can
pass it out to the JIT, instead of automagically converting it to .byte
directives.)
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I figure that misha has done a lot of things on my todo list, the least I
can do is reciprocate a bit. :)
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they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).
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* Labeled sections that are not currently used in the Sparc backend as not
requiring completion at this time.
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* Added instruction classes which start building from rs1, then rs2, and rd.
* Fixed order of operands in classes 4.1 and 4.2; added 4.6 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6561 91177308-0d34-0410-b5e6-96231b3b80d8
* Added new classes which start building from rs1, adding rs2, and then rd.
* Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 .
* Fixed comments to reflect Real Life (tm).
* Removed "don't care" commented out assignments and dead classes (#if 0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6560 91177308-0d34-0410-b5e6-96231b3b80d8
