Commit Graph

338 Commits

Author SHA1 Message Date
Bob Wilson
d4bfd54ec2 Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like
all the other LDM/STM instructions.  This fixes asm printer crashes when
compiling with -O0.  I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.

Prior to this change VLDM/VSTM used addressing mode #5, but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier.  Much of the backend
was not aware of these special cases.  The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode.  I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON.  Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 23:18:17 +00:00
Bob Wilson
22f5dc79c0 Rename sat_shift operand to shift_imm, in preparation for using it for other
instructions besides saturate instructions.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 18:27:34 +00:00
Johnny Chen
1adc40cac3 Cleaned up the for-disassembly-only entries in the arm instruction table so that
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:46:17 +00:00
Bob Wilson
eaf1c98a7c Move the ARM SSAT and USAT optional shift amount operand out of the
instruction opcode.  This also fixes part of PR7792.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:10:46 +00:00
Bob Wilson
1d9125a6ff ARM "rrx" shift operands do not have an immediate. PR7790.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110292 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 00:34:42 +00:00
Daniel Dunbar
7b81a0ef17 Update CMake files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 00:08:13 +00:00
Chris Lattner
f447a5f144 sink the arm implementations of ASmPrinter and MCInstLower
out of the AsmPrinter directory into libarm.  Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:44:46 +00:00
Evan Cheng
60108e96bb Split -enable-finite-only-fp-math to two options:
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 22:07:12 +00:00
Bob Wilson
273ff31e13 Remove restriction on NEON alignment values. Some of the NEON ld/st
instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 23:54:43 +00:00
Bob Wilson
6dce00ced4 Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to
avoid replicated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 04:44:34 +00:00
Duncan Sands
3472766f9e Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 08:16:59 +00:00
Bob Wilson
a0148c360e Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:47:20 +00:00
Bob Wilson
f967ca0eaf Represent NEON load/store alignments in bytes, not bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107701 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 21:26:18 +00:00
Bob Wilson
e45f72c833 Fix incorrect asm-printing of some NEON immediates. Fix weak testcase so
that it checks the immediate values, not just the instructions opcodes.
Radar 8110263.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107487 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 17:23:44 +00:00
Bob Wilson
1a913ed178 Add instruction encoding for the Neon VMOV immediate instruction. This changes
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction.  This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed.  Testcase for the encoding will follow later when MC has
more support for ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105836 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11 21:34:50 +00:00
Evan Cheng
12616727c7 Use report_fatal_error, not llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 23:45:31 +00:00
Evan Cheng
84f60b7359 llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104891 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 22:08:38 +00:00
Bob Wilson
d984eb6073 Fix some bad fall-throughs in a switch statement. Both the 'Q' and 'R' cases
should fall through to the 'H' case, but instead 'Q' was falling through to 'R'
so that it would do the wrong thing for a big-endian ARM target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 20:23:42 +00:00
Jakob Stoklund Olesen
e00fa64c16 Use enums instead of literals in the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 00:15:15 +00:00
Jakob Stoklund Olesen
558661d271 Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
from ARMRegisterInfo.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 16:54:32 +00:00
Rafael Espindola
18c1021ec1 Add support for movi32 of global values to the new (MC) asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 05:16:34 +00:00
Duncan Sands
16d8f8bd91 I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 20:16:09 +00:00
Dale Johannesen
3f282aa94b Handle target-specific form of DBG_VALUE in AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 20:07:31 +00:00
Dan Gohman
0d805c33d1 Add const qualifiers to TargetLoweringObjectFile usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:44:48 +00:00
Johnny Chen
c7b65914e0 Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 22:40:20 +00:00
Johnny Chen
16fda6982b In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(),
this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 19:57:21 +00:00
Johnny Chen
d73d187e33 Remove the assert() from printAddrMode2OffsetOperand(). "#0 and #-0" are
considered legal instructions.

Refs: A8.6.51 LDC, LDC2 (immediate) -- page A8-107, A8.6.58 LDR (immediate, ARM)
-- page A8-121, and A8.6.194 STR (immediate, ARM) -- page A8-395.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 19:10:52 +00:00
Dan Gohman
46510a73e9 Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 01:51:59 +00:00
Bob Wilson
b123b8bee0 Replace r101053 with a fix for getSOImmValRotate() so that it will correctly
recognize all the valid rotated immediates.  This fixes the disassembler
issue and will also help codegen for some unusual constant values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 02:11:48 +00:00
Johnny Chen
bb6e9d8cf7 Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12 18:46:53 +00:00
Chris Lattner
22772214de remove the TargetLoweringObjectFileMachO::getMachoSection
api and update clients to use MCContext instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 20:40:11 +00:00
Chris Lattner
0333535054 don't use emitlabel in the arm asm printer yet, the order
isn't well specified.  ARM really needs to have its instprinter
finished at some point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100439 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 17:52:31 +00:00
Chris Lattner
0752cda4de fix a couple problems I introduced handling symbols
with spaces in them.  Sym->getName()  !=   OS << *Sym




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 16:32:14 +00:00
Chris Lattner
90429c487f just have all targets create the DwarfWriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 00:42:55 +00:00
Chris Lattner
8e680482c1 simplify various getAnalysisUsage implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 00:38:44 +00:00
Chris Lattner
3f53c8398d clean up the asmprinter header and privatize some stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 18:52:31 +00:00
Chris Lattner
9d1c1ada21 remove TargetMachine.h #include, also, TRI isn't used frequently
enough to warrant caching in AsmPrinter, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 18:06:11 +00:00
Chris Lattner
b23569aff0 Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 08:18:47 +00:00
Chris Lattner
9d7efd3081 mcize a bunch more stuff, using EmitRawText for things we
don't have mcstreamer support for yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 07:05:53 +00:00
Chris Lattner
7ad07c4636 convert the non-MCInstPrinter'ized EmitInstruction
implementations to use EmitRawText instead of writing
directly to "O".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 06:12:20 +00:00
Chris Lattner
c75c028a15 fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
raw_ostream to print to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:29:35 +00:00
Chris Lattner
d374087be5 fix an ugly wart in the MCInstPrinter api where the
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:04:31 +00:00
Chris Lattner
35c33bd772 change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter.  Instead, pass it in explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 04:47:45 +00:00
Chris Lattner
0c08d09204 asmstreamerize the .size directive for function bodies, force clients
of printOffset to pass in a stream to print to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03 22:28:33 +00:00
Bill Wendling
5e1b55d672 Comment the changes for r98218 and friends inside the source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-31 18:47:10 +00:00
Chris Lattner
9b97a73ded Rip out the 'is temporary' nonsense from the MCContext interface to
create symbols.  It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.

This fixes rdar://7807601.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30 18:10:53 +00:00
Bob Wilson
226036ee73 Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
with changes to add a separate optional register update argument.  Change all
the NEON instructions with address register writeback to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99095 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:13:40 +00:00
Daniel Dunbar
6b7c2cf5d4 Fix -Asserts warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98928 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 03:18:23 +00:00
Johnny Chen
77bdc48eb6 Refines 98745 so that it only contains the patch related to the output of the
addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>.

This patch removes the impl of printT2AddrModeImm8s4OffsetOperand() from
ARMAsmPrinter.cpp.  It is used by disassembler as of now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17 23:01:59 +00:00
Johnny Chen
9e08876a2a Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17 17:52:21 +00:00