Commit Graph

12647 Commits

Author SHA1 Message Date
Chris Lattner
b0f294c14b use MachineModuleInfoMachO for non-lazy gv stubs instead of a private map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:38:33 +00:00
Chris Lattner
ee8b32981e remove dead map
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:11:25 +00:00
Chris Lattner
a10343f039 don't bother trying to avoid emitting redundant constant pool alignment directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:08:02 +00:00
Chris Lattner
fc5451e82f remove accidental comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:03:41 +00:00
Chris Lattner
74cd3b7ceb emit .subsections_via_symbols through MCStreamer instead of textually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:03:08 +00:00
Chris Lattner
4a071d667d cleanup doFinalization -> EmitEndOfAsmFile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 17:59:19 +00:00
Nate Begeman
ed748a0677 PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 17:31:16 +00:00
Torok Edwin
6602922878 Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS.
LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 11:00:58 +00:00
Nate Begeman
a09008bf6d Add support for matching shuffle patterns with palignr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 02:17:23 +00:00
Evan Cheng
d36076e4a3 Turn on post-alloc scheduling for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 19:57:27 +00:00
Evan Cheng
eb6e1daa43 Oops. I forgot to change the tests first. Disable post-alloc scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 18:31:31 +00:00
Evan Cheng
ff89dcb06f -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot 
move above a store of spill slot #2. 
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 18:16:27 +00:00
Evan Cheng
20270c9093 Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 06:27:36 +00:00
Evan Cheng
491f54f1fd Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 09:20:14 +00:00
Evan Cheng
6553155172 Revert 84315 for now. Re-thinking the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 07:53:04 +00:00
Evan Cheng
bf125583f8 Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 06:22:26 +00:00
Victor Hernandez
a276c603b8 Remove MallocInst from LLVM Instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84299 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 01:18:07 +00:00
Evan Cheng
fa16354e03 Change createPostRAScheduler so it can be turned off at llc -O1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 21:06:15 +00:00
Benjamin Kramer
6f892bbaf9 Update CMake file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 10:29:08 +00:00
Sanjiv Gupta
5386a35c5a Cleaned up some code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84251 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 08:58:34 +00:00
Evan Cheng
b46aea1032 I am no spelling bee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84250 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 06:18:09 +00:00
Evan Cheng
d3dd50fec0 Enable post-alloc scheduling for all ARM variants except for Thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 06:11:08 +00:00
Evan Cheng
fee0c1074c Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 05:33:58 +00:00
Bob Wilson
1dd4348408 Fix more NEON instruction encodings.
Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 03:58:44 +00:00
Bob Wilson
934f98b536 Revert svn r80498 and replace it with a different solution. The only problem
I can see with the original code was that I forgot that this runs after
type legalization and hence the result type will always be i32. (Custom
legalization of EXTRACT_VECTOR_ELT is only enabled for vector types with
8- and 16-bit elements.)

Regarding the FIXME comment: any information about sign and zero-extension
should be captured by separate extension operations.  The DAG combiner should
handle those to produce either VGETLANEu or VGETLANEs, and that seems to be
working now.  If there are cases that we're missing, let me know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 23:12:05 +00:00
Anton Korobeynikov
4fac9470c4 Dllexport stuff cleanup:
1. Emit external function type information for all COFF targets since it's
a feature of object format
2. Emit linker directives only for cygming (since this is ld-specific stuff)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 22:36:18 +00:00
Sandeep Patel
452b54a8ae Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 22:25:32 +00:00
Bob Wilson
6f122625dd Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements.
Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 21:57:47 +00:00
Kevin Enderby
e2a98dd2a4 Fix ARM memory operand parsing of post indexing with just a base register, that
is just "[Rn]" and no tailing comma with an offset, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84205 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 21:42:45 +00:00
Bob Wilson
b923953733 Fix a potential performance problem in placing ARM constant pools.
In the case where there are no good places to put constants and we fall back
upon inserting unconditional branches to make new blocks, allow all constant
pool references in range of those blocks to put constants there, even if that
means resetting the "high water marks" for those references.  This will still
terminate because you can't keep splitting blocks forever, and in the bad
cases where we have to split blocks, it is important to avoid splitting more
than necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84202 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 20:49:47 +00:00
Kevin Enderby
515d509360 More bits of the ARM target assembler for llvm-mc, code added to parse labels
as expressions, code for parsing a few arm specific directives (still needs
the MCStreamer calls for these).  Some clean up of the operand parsing code
and adding some comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 20:48:48 +00:00
Evan Cheng
79f7400e4f Remove X86Subtarget::IsLinux. It's no longer being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 20:23:21 +00:00
Benjamin Kramer
5814fefc7f Add files Sanjiv forgot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 19:46:34 +00:00
Sanjiv Gupta
753ec15d5f Re-apply 84180 with the fixed test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 19:26:25 +00:00
Jakob Stoklund Olesen
6ad8c84d70 Move Blackfin intrinsics into the Target/Blackfin directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 18:50:52 +00:00
Jakob Stoklund Olesen
0383606b65 Clean up TargetIntrinsicInfo API. Add pure virtual methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 18:49:26 +00:00
Daniel Dunbar
1ead150c92 Revert "Complete Rewrite of AsmPrinter, TargetObjectFile based on new
PIC16Section class", it breaks globals.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 15:02:14 +00:00
Sanjiv Gupta
8da373cf62 Complete Rewrite of AsmPrinter, TargetObjectFile based on new PIC16Section class
derived from MCSection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 10:10:43 +00:00
Sanjiv Gupta
cf1e5be2a2 Few changes to comply with new DebugInfo Metadata representation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 09:48:25 +00:00
Bob Wilson
549dda9d82 Be smarter about reusing constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 05:52:29 +00:00
Bob Wilson
36fa5321ba Fix another problem with ARM constant pools. Radar 7303551.
When ARMConstantIslandPass cannot find any good locations (i.e., "water") to
place constants, it falls back to inserting unconditional branches to make a
place to put them.  My recent change exposed a problem in this area.  We may
sometimes append to the same block more than one unconditional branch.  The
symptoms of this are that the generated assembly has a branch to an undefined
label and running llc with -debug will cause a seg fault.

This happens more easily since my change to prevent CPEs from moving from
lower to higher addresses as the algorithm iterates, but it could have
happened before.  The end of the block may be in range for various constant
pool references, but the insertion point for new CPEs is not right at the end
of the block -- it is at the end of the CPEs that have already been placed
at the end of the block.  The insertion point could be out of range.  When
that happens, the fallback code will always append another unconditional
branch if the end of the block is in range.

The fix is to only append an unconditional branch if the block does not
already end with one.  I also removed a check to see if the constant pool load
instruction is at the end of the block, since that is redundant with
checking if the end of the block is in-range.

There is more to be done here, but I think this fixes the immediate problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15 05:10:36 +00:00
Bob Wilson
b3642dccee Fix instruction encoding bits for NEON VPADAL.
Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 21:43:17 +00:00
Bob Wilson
681a2ad403 Remove unused variables to fix build warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 21:40:45 +00:00
Jim Grosbach
b9d319b585 Inst{11-8} for vshl should be 0b0101, not 0b1111.
Refs: A7-17 & A8-750.

Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84131 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 20:31:01 +00:00
Bob Wilson
8e86b5195b Set instruction encoding bits 4 and 7 for ARM register-register and
register-shifted-register instructions.  Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 19:00:24 +00:00
Bob Wilson
24f995d84b Refactor code to select NEON VST intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84122 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 18:32:29 +00:00
Bob Wilson
3e36f13ba7 Refactor code to select NEON VLD intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 17:28:52 +00:00
Bob Wilson
9649344cb5 More refactoring. NEON vst lane intrinsics can share almost all the code for
vld lane intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84110 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 16:46:45 +00:00
Bob Wilson
a7c397c9c3 Refactor code for selecting NEON load lane intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 16:19:03 +00:00
Dan Gohman
1b1764b3f7 Make isSafeToClobberEFLAGS more aggressive. Teach it to scan backwards
(for uses marked kill and defs marked dead) a few instructions in
addition to forwards. Also, increase the maximum number of instructions
to scan, as it appears to help in a fair number of cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14 00:08:59 +00:00