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4415 Commits

Author SHA1 Message Date
Pawel Wodnicki
3c13c3ebdd really fix permissions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168256 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 06:38:44 +00:00
Pawel Wodnicki
723c394e43 fix permissions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168255 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 06:35:19 +00:00
Pawel Wodnicki
7e2db212a0 adding whose code is it anywa tools 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168254 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 06:24:37 +00:00
Weiming Zhao
e56764bad1 Remove hard coded registers in ARM ldrexd and strexd instructions 
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 21:55:34 +00:00
Dmitri Gribenko
65f3f32100 FileCheck: remove useless 'continue' at the end of a 'while(){}' loop. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168048 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 16:50:59 +00:00
Eric Christopher
06b423452c Remove the CellSPU port. 
Approved by Chris Lattner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-14 22:09:20 +00:00
Alexander Kornienko
70a870add8 Support for [[@LINE]], [[@LINE+<offset>]], [[@LINE-<offset>]] expressions in 
FileCheck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167978 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-14 21:07:37 +00:00
Alexander Kornienko
08639983de Added %(line), %(line+<number>), %(line-<number>) substitutions to lit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167971 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-14 20:26:19 +00:00
Benjamin Kramer
79949597b2 Simplify the SmallVector pretty printer for LLDB a bit and make it work with reference types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167674 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-10 09:45:32 +00:00
Evandro Menezes
f1adbfe4e2 Fix issue with invalid flat operand number 
Avoid iterating over list of operands beyond the number of operands in it.

PS: this fixes issue with revision #167634.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167635 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-09 21:27:03 +00:00
Evandro Menezes
f1bb42152a Fix issue with invalid flat operand number 
Avoid iterating over list of operands beyond the number of operands in it.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167634 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-09 20:29:37 +00:00
Michael Liao
be02a90de1 Add support of RTM from TSX extension 
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-08 07:28:54 +00:00
Rafael Espindola
322ff88345 Fix a build problem with xlc. The error message was 
"../llvm-git/utils/TableGen/CodeGenSchedule.cpp", line 1594.12: 1540-0218 (S) The call does not match any parameter list for "operator+".
"../llvm-git/include/llvm/ADT/STLExtras.h", line 130.1: 1540-1283 (I) "template <class _Iterator, class Func> llvm::operator+(mapped_iterator<_Iterator,Func>::difference_type, const mapped_iterator<_Iterator,Func> &)" is not a viable candidate.

Patch by Kai.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167311 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-02 20:57:36 +00:00
Jakob Stoklund Olesen
ad0b3b21e3 Generate a table-driven version of TRI::composeSubRegIndices(). 
Explicitly allow composition of null sub-register indices, and handle
that common case in an inlinable stub.

Use a compressed table implementation instead of the previous nested
switches which generated pretty bad code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167190 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-01 00:32:10 +00:00
Kaelyn Uhrain
50a6102397 Don't return false when the function's return type is a pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166719 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-25 21:25:08 +00:00
Joerg Sonnenberger
61131ab15f Remove exception handling usage from tblgen. 
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166712 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-25 20:33:17 +00:00
David Blaikie
a8a0a155de Remove unused member & unnecessary semicolon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166694 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-25 17:04:55 +00:00
NAKAMURA Takumi
0b031cb717 llvm/utils/TableGen/CMakeLists.txt: Update corresponding to r166685. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166686 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-25 15:57:56 +00:00
Sebastian Pop
becdf4d7cd add TableGen support to create relationship maps between instructions 
Relationship maps are represented as InstrMapping records which are parsed by
TableGen and the information is used to construct mapping tables to represent
appropriate relations between instructions. These tables are emitted into
XXXGenInstrInfo.inc file along with the functions to query them.

Patch by Jyotsna Verma <jverma@codeaurora.org>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166685 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-25 15:54:06 +00:00
Joerg Sonnenberger
2c6d71388f Don't use stack unwinding to provide the location information for 
SetTheory, but pass down the location explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166629 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-24 22:03:59 +00:00
Lang Hames
64486737d5 Allow the commuted form of tied-operand constraints in tablegen ("$dst = $src", 
rather than "$src = $dst").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166382 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-20 22:44:13 +00:00
Daniel Dunbar
6b283ea945 lit: Rename the valgrind leaks feature to match what is currently used 
(vg_leak).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166306 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 20:29:30 +00:00
Daniel Dunbar
f793fbc569 lit: Remove support for XTARGET. 
- The XTARGET feature (inherited from old DG tests) was just confusing (and
   barely ever used). The same effect can now be achieved with a combination of
   the more useful REQUIRES and XFAIL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166305 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 20:29:27 +00:00
Daniel Dunbar
f854597fc1 lit: Add 'valgrind' and 'valgrind-leaks' features when valgrind is used. 
- These can be used with the XFAIL options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166303 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 20:12:00 +00:00
Daniel Dunbar
7badf45739 lit: Propagate TERM variable in environment, some tools can do really obscure 
odd things if this is missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166289 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 17:23:34 +00:00
Daniel Dunbar
44a83f0920 lit: Allow XFAIL: lines to also refer to "features". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166224 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-18 20:43:04 +00:00
Bill Wendling
07aae2e7d5 Add an enum for the return and function indexes into the AttrListPtr object. This gets rid of some magic numbers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165924 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-15 07:29:08 +00:00
Bill Wendling
cb3de0bc80 Attributes Rewrite 
Convert the internal representation of the Attributes class into a pointer to an
opaque object that's uniqued by and stored in the LLVMContext object. The
Attributes class then becomes a thin wrapper around this opaque
object. Eventually, the internal representation will be expanded to include
attributes that represent code generation options, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-15 04:46:55 +00:00
Chad Rosier
6e006d3de8 [ms-inline asm] Use the new API introduced in r165830 in lieu of the 
MapAndConstraints vector.  Also remove the unused Kind argument.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165833 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-12 22:53:36 +00:00
Richard Trieu
5628920346 Change (!list.size() == 0) to (!list.empty()). No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165812 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-12 17:57:35 +00:00
Sean Silva
ed84062812 Remove unnecessary classof()'s 
isa<> et al. automatically infer when the cast is an upcast (including a
self-cast), so these are no longer necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165767 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-11 23:30:49 +00:00
Chad Rosier
fcb5e95c31 Remove extra semicolons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165757 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-11 22:25:56 +00:00
Sean Silva
fff8287f10 tblgen: Compile TableGen without RTTI. 
TableGen no longer needs RTTI!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165651 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 20:27:18 +00:00
Sean Silva
8b43dbf9ea tblgen: Move mini Type hierarchy to LLVM-style RTTI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165648 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 20:24:49 +00:00
Sean Silva
3f7b7f8ce0 tblgen: Use semantically correct RTTI functions. 
Also, some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165647 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 20:24:47 +00:00
Sean Silva
6cfc806a6b tblgen: Mechanically move dynamic_cast<> to dyn_cast<>. 
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165646 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 20:24:43 +00:00
Bill Wendling
11d00420e4 Pass into the AttributeWithIndex::get method an ArrayRef of attribute 
enums. These are then created via the correct Attributes creation method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165607 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 06:13:42 +00:00
Andrew Trick
dbe6d43dfa TableGen subtarget emitter cleanup. 
Consistently evaluate Aliases and Sequences recursively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165604 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 05:43:13 +00:00
Andrew Trick
6312cb0997 misched: Generate IsBuffered flag for machine resources. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165602 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 05:43:04 +00:00
Micah Villmow
791cfc211a Move TargetData to DataLayout. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165403 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-08 16:39:34 +00:00
Chad Rosier
9ba9d4d76b [ms-inline asm] Add a few typedefs to simplify future changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-05 18:41:14 +00:00
Sean Silva
736ceace11 tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>. 
This is a mechanical change of dynamic_cast<> to dyn_cast<>. A number of
these uses are actually more like isa<> or cast<>, and will be changed
to the semanticaly appropriate one in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165291 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-05 03:31:58 +00:00
Andrew Trick
13745262a8 Added instregex support to TableGen subtarget emitter. 
This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165180 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-03 23:06:32 +00:00
Andrew Trick
2062b1260f TableGen subtarget emitter, nearly first class support for SchedAlias. 
A processor can now arbitrarily alias one SchedWrite onto
another. Only the SchedAlias definition need be within the processor
model. The aliased SchedWrite may be a SchedVariant, WriteSequence, or
transitively refer to another alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165179 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-03 23:06:28 +00:00
Andrew Trick
fe05d98c25 Cleanup TableGen subtarget emitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165178 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-03 23:06:25 +00:00
Chad Rosier
d494a3bfc5 [ms-inline asm] Default to the 'm' constraint. This matches the behavior of the 
MSVC compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165174 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-03 22:18:38 +00:00
Sean Silva
9e21138ab7 tblgen: Migrate llvm-tblgen to new TableGenMain API. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165166 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-03 21:29:19 +00:00
Chad Rosier
c69bb70deb Fix 80-column violations. Cleanup whitespace in generated code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164983 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-02 00:25:57 +00:00
Chad Rosier
22685876ed [ms-inline asm] Add the convertToMapAndConstraints() function that is used to 
map constraints and MCInst operands to inline asm operands.  This replaces the
getMCInstOperandNum() function.

The logic to determine the constraints are not in place, so we still default to
a register constraint (i.e., "r"). Also, we no longer build the MCInst but
rather return just the opcode to get the MCInstrDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164979 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-01 23:45:51 +00:00
Sylvestre Ledru
94c22716d6 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 10:14:43 +00:00
Sylvestre Ledru
7e2c793a2b Fix a typo 'iff' => 'if' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 09:59:43 +00:00
Chad Rosier
2590c2e1e9 Rather then have a wrapper function, have tblgen instantiate the implementation. 
Also remove an unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 22:57:55 +00:00
Chad Rosier
00796a1b15 Rather then have a wrapper function, have tblgen instantiate the implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 19:32:29 +00:00
Andrew Trick
9264988311 Machine Model (-schedmodel only). Added SchedAliases. 
Allow subtargets to tie SchedReadWrite types to processor specific
sequences or variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164451 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 02:24:21 +00:00
Chad Rosier
d717a066c6 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 22:21:26 +00:00
Chad Rosier
6018944afd Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164406 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 19:25:59 +00:00
Dmitri Gribenko
9d227af8f7 Clarify comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164371 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 15:26:34 +00:00
Micah Villmow
3e9b6db60f Add in new data types that are used by AMDIL/ANL among others. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 22:47:07 +00:00
Owen Anderson
eb79b545fc Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164256 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 22:15:06 +00:00
Craig Topper
8a312fb3aa Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164204 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 06:37:45 +00:00
Andrew Trick
3b8fb648c6 SchedMachineModel: compress the CPU's WriteLatencyTable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164199 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 04:43:19 +00:00
Sean Silva
b2df610b44 Iterate deterministicaly over ClassInfo*'s 
Fixes an observed instance of nondeterministic TableGen output.

Review by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164191 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 01:47:03 +00:00
Sean Silva
decfdf548b Iterate deterministically over register classes 
Fixes an observed instance of nondeterministic TableGen output.

Review by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164190 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 01:47:01 +00:00
Sean Silva
90fee07298 Refactor Record* by-ID comparator to Record.h 
This is a generally useful utility; there's no reason to have it hidden
in CodeGenDAGPatterns.cpp.

Also, rename it to fit the other comparators in Record.h

Review by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164189 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 01:47:00 +00:00
Benjamin Kramer
30ce40e3f7 FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character after the colon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164165 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 20:51:39 +00:00
Craig Topper
3a36444366 Make custom operand parsing mnemonic indices use the same mnemonic table as the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164109 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 07:02:21 +00:00
Craig Topper
fee7f01d1e Use variable type for index into mnemonic table. Shrinks size of index field on in tree targets. Saving static data space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164108 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 06:10:45 +00:00
Andrew Trick
34aadd6334 Replaced ReInitMCSubtargetInfo with InitMCProcessor. 
Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164105 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 05:33:15 +00:00
Andrew Trick
e076bb1e93 comment typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164097 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 04:03:30 +00:00
Andrew Trick
e3dbc98a4f TableGen subtarget emitter. Use getSchedClassIdx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164096 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 03:55:55 +00:00
Andrew Trick
4d2d1c49d7 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164095 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 03:41:43 +00:00
Andrew Trick
ee290ba35a TableGen subtarget emitter. Remove unnecessary header dependence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164094 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 03:32:57 +00:00
Andrew Trick
e127dfd0b1 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164092 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 03:18:56 +00:00
Craig Topper
b198f5c897 Mark asm matcher conversion table as const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164088 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 01:41:49 +00:00
Craig Topper
be480ff607 Fix typo in comment. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164086 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 01:13:36 +00:00
Andrew Trick
e4095f95ac Backout the wrong subtarget emitter fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164078 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 23:14:15 +00:00
Andrew Trick
f23ddf54ea Fix release build after reverting 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164075 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 23:05:04 +00:00
Andrew Trick
e1b5328717 Revert r164061-r164067. Most of the new subtarget emitter. 
I have to work out the Target/CodeGen header dependencies
before putting this back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164072 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 23:00:42 +00:00
Andrew Trick
a2a47d1c50 InitMCProcessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164066 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:19:12 +00:00
Andrew Trick
5d94082143 comment typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164064 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:19:04 +00:00
Andrew Trick
41be51b72c TableGen subtarget emitter. Use getSchedClassIdx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164063 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:19:01 +00:00
Andrew Trick
021ba269b2 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164062 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:58 +00:00
Andrew Trick
db7afac457 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164061 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:55 +00:00
Andrew Trick
544c88039f TableGen subtarget emitter. Format and emit data tables for the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164060 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:50 +00:00
Andrew Trick
52c3a1d654 TableGen subtarget emitter. Generate data tables for the new machine model. 
Map the CodeGenSchedule object model onto data tables. The structure
of the data tables is defined in MC, so for convenience we include
MCSchedule.h. The alternative is maintaining a redundant copy of the
table structure definitions. Mapping the object model onto data tables
is sufficiently complicated that it should not be interleaved with
emitting source code. This avoids major problem with the backend for
itinerary generation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164059 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:48 +00:00
Andrew Trick
40096d2693 TableGen subtarget emitter. Emit processor resources for the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164058 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:45 +00:00
Andrew Trick
bc4ff6e3cf TableGen subtarget parser: Add getProcResourcesIdx(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164057 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:43 +00:00
Jim Grosbach
9bb938c540 TableGen: Add initializer. 
Keep GCC's warnings happy. It can't reason out that the state machine won't
ever hit the potentially uninitialized use in OPC_FilterValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164041 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 18:00:53 +00:00
Axel Naumann
3780ad8b99 Fix a few vars that can end up being used without initialization. 
The cases where no initialization happens should still be checked for logic flaws.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164032 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 14:20:57 +00:00
Michael Liao
efd841cdc5 Fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164012 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 04:43:39 +00:00
Craig Topper
af8d66ce9a Add 'virtual' keywoards to output file for overridden functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164002 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-16 18:25:36 +00:00
Craig Topper
ef2340ef48 Add 'virtual' keywoards to output file for overridden functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163999 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-16 16:35:22 +00:00
Dmitri Gribenko
4e0ae44b3a Fix Doxygen issues: wrap code examples in \code and use \p to refer to 
parameters.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163984 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 20:22:05 +00:00
Craig Topper
5974c31acb Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163959 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 01:22:42 +00:00
Andrew Trick
3cbd1786ac TableGen subtarget parser. Handle new machine model. 
Collect processor resources from the subtarget defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163953 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 00:20:02 +00:00
Andrew Trick
5e613c260b TableGen subtarget parser. Handle new machine model. 
Infer SchedClasses from variants defined by the target or subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163952 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 00:19:59 +00:00
Andrew Trick
48605c3406 TableGen subtarget parser. Handle new machine model. 
Collect SchedClasses and SchedRW types from the subtarget defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163951 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 00:19:57 +00:00
Craig Topper
f4d78241ea Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163880 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-14 08:33:11 +00:00
Craig Topper
4e5babe4f3 Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-14 06:37:49 +00:00
Manman Ren
785a41d138 AsmWriterEmitter: OpInfo2 should be unsigned 16-bit. 
Fix an issue in r163814.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163837 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-13 20:47:48 +00:00