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3228 Commits

Author SHA1 Message Date
Chris Lattner
78caacc226 replace stuff like: 
let AsmString = !strconcat(
                     !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)),
                     !strconcat("\t", asm));

with:

  let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);

:)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:05:18 +00:00
Eric Christopher
e540a6f94a Comment out fastisel debugging message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115717 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:50:58 +00:00
Eric Christopher
022b7fb045 Random cleanup and make the intermediate register in fptosi a 
32-bit fp reg, not 64-bit.

Fixes SingleSource.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:13:24 +00:00
Jim Grosbach
d86609fca4 Increase the number of bits used internally by the ARM target to represent the 
addressing mode from four to five.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 18:14:55 +00:00
Michael J. Spencer
f000a7a212 fix MSVC 2010 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:00:43 +00:00
Michael J. Spencer
2bbb769091 Cleanup Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:00:33 +00:00
Rafael Espindola
0febc4657b Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do 
so and also change X86 for consistency.

Investigating if this can be improved a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:59:45 +00:00
Evan Cheng
ec45f60cab Major changes to Cortex-A9 itinerary. 
1. Model dual issues as two FUs.
2. Model the pipelines correctly: two symmetric ALUs, the multiplier is a
   dependent pipeline on ALU0.
The changes do not have much impact on codegen right now. But I plan to make
pre-RA scheduler multi-issue aware which should take good advantage of the
changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 02:03:59 +00:00
Eric Christopher
890dbbec57 Start on lowering global addresses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 00:32:44 +00:00
Jim Grosbach
443e625d8a PrintSpecial() can go away now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:27:48 +00:00
Eric Christopher
c9932f6f60 Stub out constant GV handling, fixes C++ eh tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:24:42 +00:00
Jim Grosbach
78890f41f4 Nuke the rest of the :comment references 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115373 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:21:38 +00:00
Jim Grosbach
adde5da638 Nuke a bunch of no-longer-needed comment-only asm strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115370 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:09:33 +00:00
Evan Cheng
055028215d Fix r115332: correctly model AGU / NEON mux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115365 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:52:29 +00:00
Owen Anderson
e3cc84a43d Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs. For now, 
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:45:50 +00:00
Jim Grosbach
7ac1609a3b Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:39:28 +00:00
Evan Cheng
ef0ccad725 Fix scheduling infor for vmovn and vshrn which I broke accidentially. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:48:06 +00:00
Evan Cheng
df9da6a033 Add operand cycles for vldr / vstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:40:30 +00:00
Eric Christopher
e6ca6771e3 Direct calls only for arm fast isel for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:33:12 +00:00
Evan Cheng
cae6a12a99 NEON scheduling info fix. vmov reg, reg are single cycle instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115344 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:50:58 +00:00
Eric Christopher
45547b844d Fix thinko on store instructions. Fixes test_indvars failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:46:04 +00:00
Owen Anderson
00d4f48168 Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115341 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:33:47 +00:00
Owen Anderson
aa9f0a57d0 Provide an option to restore old-style if-conversion heuristics for Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:28:06 +00:00
Evan Cheng
7c3423f413 Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 19:41:46 +00:00
Jim Grosbach
bffa1a5cf3 grammar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115314 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 14:57:48 +00:00
Eric Christopher
14df88282b Implement double return values in calls. Fixes 
SingleSource/Regression/C/casts.c.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115246 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 00:00:11 +00:00
Owen Anderson
b3c04ec956 Temporarily add a flag to make it easier to compare the new-style ARM if 
conversion heuristics to the old-style ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115239 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:48:38 +00:00
Eric Christopher
086378597d Movement and cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 22:34:19 +00:00
Eric Christopher
f9764fa14f Start of generalized call support for ARM fast isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115203 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 20:49:44 +00:00
Jim Grosbach
a3fbadfcd8 Nuke a few more unused asm strings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 19:53:58 +00:00
Jim Grosbach
3787a40e03 Move getPointerSize() to the base class since it's not dependent on MachO 
vs. ELF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:45:51 +00:00
Jim Grosbach
af2a8b21f1 Remove extraneous ';' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:19:17 +00:00
Jim Grosbach
71d933a49e The asm strings are never used at all, so just nuke 'em entirely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:56:53 +00:00
Kevin Enderby
8ebf66236e Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:38:07 +00:00
Jim Grosbach
2f24c4ece0 80 column fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 15:25:22 +00:00
Jason W Kim
a4c27248b5 Fix two tiny issues (ARM does not need COFF) and comment sanity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 14:58:19 +00:00
Jim Grosbach
f73fd7278f trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115136 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:21:00 +00:00
Jim Grosbach
87dc3aa2d8 Remove misplaced ';'. Make buildbots happy, hopefully. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:20:34 +00:00
Jason W Kim
afd1cc2578 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:45:56 +00:00
Jim Grosbach
7ebc863c15 Go ahead and jump! 
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:18:06 +00:00
Jason W Kim
d4d4f4f488 I added a new file ARMAsmBackend which stubs out in similar ways to 
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)

Tested against -r115126



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115129 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:17:26 +00:00
Jim Grosbach
a4e97de71d Now that the pseudos that needed this are all custom lowered, we can go back 
to an empty PrintSpecial()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:02:22 +00:00
Jim Grosbach
2317e40539 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:57:53 +00:00
Evan Cheng
0e55fd61ae ARM instruction itinerary fixes: 
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:08:25 +00:00
Eric Christopher
a9a7a1a9a5 Refactor arm fast isel libcall handling so that pieces can be used 
for generic call handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 23:11:09 +00:00
Evan Cheng
3881cb7a5d Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP 
pipeline forwarding path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:42:35 +00:00
Eric Christopher
8cf6c60710 Add a convenience variable so I'm not chasing all over looking for 
a context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:24:45 +00:00
Jim Grosbach
828916203a Add specializations of addrmode2 that allow differentiating those forms 
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 19:03:54 +00:00
Bob Wilson
7122ba7efb Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:54:10 +00:00
Jim Grosbach
be91232900 Add braces for legibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:32:29 +00:00