Jay Foad
b33f8e3e55
Merge gtest-1.6.0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136212 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 09:25:14 +00:00
Jeffrey Yasskin
a44defeb22
Explicitly cast narrowing conversions inside {}s that will become errors in
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C++0x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 06:22:51 +00:00
Dan Gohman
cbdccdeea9
Revert r136156, which broke several buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:10:27 +00:00
Eli Friedman
8a552bb85a
Misc mid-level changes for new 'fence' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:08:30 +00:00
Eli Friedman
751bef77d0
Minor simplification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:02:25 +00:00
Bruno Cardoso Lopes
9b4ad12b1e
Move some code around to open opportunity for more shuffle matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:37 +00:00
Bruno Cardoso Lopes
cea34e41fa
The vpermilps and vpermilpd have different behaviour regarding the
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usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.
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2011-07-27 00:56:34 +00:00
Bruno Cardoso Lopes
cd9e5aed53
Remove more dead code!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:27 +00:00
Eli Friedman
6f3ba37ebb
Fix AliasSetTracker so that it doesn't make any assumptions about instructions it doesn't know about (like the atomic instructions I'm adding).
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2011-07-27 00:46:46 +00:00
Evan Cheng
bd27f5adbd
Support .code32 and .code64 in X86 assembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:38:12 +00:00
Devang Patel
26a92003cd
It is quiet possible that inlined function body is split into multiple chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry.
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2011-07-27 00:34:13 +00:00
Eric Christopher
28176195a4
Remove these two directories. The tests can be ported to dragonegg if
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they're still wanted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:07:56 +00:00
Eric Christopher
e927dc654f
Remove test/FrontendC, almost all of the tests have been migrated
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to clang now, the rest are in process (6) or have been deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:49:39 +00:00
Jakob Stoklund Olesen
00005782fa
Add support for multi-way live range splitting.
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When splitting global live ranges, it is now possible to split for
multiple destination intervals at once. Previously, we only had the main
and stack intervals.
Each edge bundle is assigned to a split candidate, and splitAroundRegion
will insert copies between the candidate intervals and the stack
interval as needed.
The multi-way splitting is used to split around compact regions when
enabled with -compact-regions. The best candidate register still gets
all the bundles it wants, but everything outside the main interval is
first split around compact regions before we create single-block
intervals.
Compact region splitting still causes some regressions, so it is not
enabled by default.
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2011-07-26 23:41:46 +00:00
Jakob Stoklund Olesen
3b92527885
Print out the MBB live-in registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen
e4709777e3
Eliminate copies of undefined values during coalescing.
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These copies would coalesce easily, but the resulting value would be
defined by a deleted instruction. Now we also remove the undefined value
number from the destination register.
This fixes PR10503.
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2011-07-26 23:00:24 +00:00
Benjamin Kramer
25ad783322
Update test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:45:39 +00:00
Benjamin Kramer
162ee5c725
Add a neat little two's complement hack for x86.
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On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can
fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add,
which can be commuted and encoded efficiently.
This code is generated for __builtin_clz and friends.
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2011-07-26 22:42:13 +00:00
Bruno Cardoso Lopes
4ea496846a
Recognize unpckh* masks and match 256-bit versions. The new versions are
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different from the previous 128-bit because they work in lanes.
Update a few comments and add testcases
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2011-07-26 22:03:40 +00:00
Dan Gohman
c680b92460
Delete unnecessarily cautious LastCALLSEQ code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:00:59 +00:00
Jim Grosbach
45f3929ef0
ARM rot_imm printing adjustment.
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Allow the rot_imm operand to be optional. This sets the stage for refactoring
away the "rr" versions from the multiclasses and replacing them with Pat<>s.
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2011-07-26 21:44:37 +00:00
Jim Grosbach
85bfd3b023
ARM cleanup of rot_imm encoding.
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Start of cleaning this up a bit. First step is to remove the encoder hook by
storing the operand as the bits it'll actually encode to so it can just be
directly used. Map it to the assembly source values 8/16/24 when we print it.
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2011-07-26 21:28:43 +00:00
Eli Friedman
61cc47e15d
Prevent x86-specific DAGCombine from creating nodes with illegal type (which could not be selected). Fixes a minor isel issue that was breaking the testcase from r136130.
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2011-07-26 21:02:58 +00:00
Evan Cheng
bfe3686aee
Remove one last reference to Target in MC library.
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2011-07-26 20:57:44 +00:00
Owen Anderson
793e79601f
Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.
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2011-07-26 20:54:26 +00:00
Nicolas Geoffray
45c8d2bc9c
Update generated code to use new API of GetElementPtrInst::Create.
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2011-07-26 20:52:25 +00:00
Jim Grosbach
84c93d4bb0
FileCheck'ize test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:49:44 +00:00
Bill Wendling
194229e591
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:42:28 +00:00
Jim Grosbach
0d87ec21d7
Fix over-zealous rename from r136095.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:41:24 +00:00
Eli Friedman
ce1986bd21
XFAIL this test while I investigate it; it's failing for an unexpected reason.
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2011-07-26 20:41:03 +00:00
Eli Friedman
24f05334e6
Add obvious missing case to switch. PR10497.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:38:49 +00:00
Eli Friedman
be9a9afee5
Fix a couple minor mistakes pointed out by Bill in adding 'fence' instruction.
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2011-07-26 20:24:06 +00:00
Evan Cheng
d6dcf39ca8
Fix llvm-mc target detection code to match llc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 19:02:16 +00:00
Andrew Trick
5acaeb5121
Updating stale documentation on regalloc modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:31:49 +00:00
Bill Wendling
726f1b90a9
Use the correct for for the version. It's little endian and my brain is
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obviously big endian. :-)
PR10502
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2011-07-26 18:31:41 +00:00
Jim Grosbach
189610f946
ARM diagnostics for ldrexd/stredx out of order paired register operands.
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2011-07-26 18:25:39 +00:00
Bruno Cardoso Lopes
cf128eab90
Remove now unused patterns. 0 insertions(+), 98 deletions(-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
5e3267dac9
Cleanup old matching for PUNPCK* variants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:27 +00:00
Devang Patel
a671a3092a
While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:09:53 +00:00
Jim Grosbach
36711e4a3c
ARM parsing and encoding tests for load/store exclusive instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:07:21 +00:00
Jim Grosbach
dfdf02dbad
ARM fix for LDREX source register encoding.
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rdar://9842203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:44:46 +00:00
Andrew Trick
5116ff671f
SCEV: Added a data structure for storing not-taken info per loop
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exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:19:55 +00:00
Duncan Sands
b08904093a
Strip trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:19:30 +00:00
Jim Grosbach
4f6f13db1a
ARM assembly parsing and encoding for SWP[B] instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:15:11 +00:00
Jim Grosbach
1ef91417bd
ARM SWP instructions store, too, not just load.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:11:05 +00:00
Jim Grosbach
1355cf1f76
Clean up the ARM asm parser a bit.
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No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:10:22 +00:00
Jim Grosbach
3d5ab367b6
ARM fix asm parsing range check for [0,31] immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:44:05 +00:00
Jim Grosbach
ed8384806e
ARM parsing and encoding for SVC instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:24:27 +00:00
Jim Grosbach
873db3eeba
ARM assembly parsing and encoding tests for SUB instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:44:05 +00:00
Jim Grosbach
a46c658c66
Update ARM STM tests. Fix check: prefix for diagnostic tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:41:22 +00:00