Evan Cheng
c548428c5d
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
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extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Evan Cheng
31f7be9fb7
Vector extract / insert index operand should have ptr type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:19:05 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Evan Cheng
f5e1dc278b
Renamed AddedCost to AddedComplexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:38:28 +00:00
Evan Cheng
5941320c0d
Allow "let AddedCost = n in" to increase pattern complexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:07:24 +00:00
Chris Lattner
1fcee4edf5
Add a new vnot_conv predicate for matching vnot's where the allones vector is
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bitconverted from some other type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27724 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 23:39:14 +00:00
Evan Cheng
1eda6e7924
Add vector_extract and vector_insert nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:21:16 +00:00
Chris Lattner
48b61a729d
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:40:33 +00:00
Evan Cheng
999f3b538f
Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 06:59:32 +00:00
Evan Cheng
e506f9ae35
Add immAllZerosV helper
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-26 09:51:39 +00:00
Chris Lattner
c985d828bc
add a vnot helper node for matching 'not' on vectors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 23:00:08 +00:00
Chris Lattner
ea93f63964
Add new intrinsic node definitions for tblgen use
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27100 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 02:29:35 +00:00
Chris Lattner
da10f19d5c
Shuffle some includes around
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27073 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 18:52:35 +00:00
Chris Lattner
da91bdcfb0
expose intrinsic info to the targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27070 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 18:44:11 +00:00
Evan Cheng
811ec1c92a
x86 ISD::SCALAR_TO_VECTOR support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 00:33:35 +00:00
Chris Lattner
39afef3150
Add a build_vector node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 06:18:01 +00:00
Chris Lattner
fa818d0b8b
add vector_shuffle
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26891 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 05:40:45 +00:00
Chris Lattner
c29e12674b
add support for the bitconvert node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 01:29:53 +00:00
Andrew Lenharth
d26b8f97c4
relax fcopysign
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26649 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-09 17:47:22 +00:00
Andrew Lenharth
97d74aac35
fcopysign support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26640 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-09 14:57:36 +00:00
Chris Lattner
41edaa0529
remove the read/write port/io intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 00:19:58 +00:00
Nate Begeman
551bf3f800
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Nate Begeman
9c3c2e9686
Whoops, didn't mean to check this in yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:56:19 +00:00
Nate Begeman
c22f357b78
Add a missing and useful pat frag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 00:51:06 +00:00
Chris Lattner
a54aa94197
Targets all now request ConstantFP to be legalized into TargetConstantFP.
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'fpimm' in .td files is now TargetConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:08 +00:00
Nate Begeman
d88fc03602
bswap implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 03:14:10 +00:00
Nate Begeman
35ef913ec2
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 21:21:00 +00:00
Evan Cheng
6da8d99f70
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:28:21 +00:00
Evan Cheng
0a3a5e29d2
Added fpimm node for ConstantFP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 02:07:49 +00:00
Jim Laskey
abf6d1784b
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:25:28 +00:00
Jim Laskey
5bf6f25b4a
Add unique id to debug location for debug label use (work in progress.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-04 15:04:11 +00:00
Andrew Lenharth
993ff1ce4a
Add support for brcond
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25058 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-01 22:16:43 +00:00
Andrew Lenharth
330851a8f6
support targetexternalsym
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25005 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-24 23:36:59 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Evan Cheng
d13b00e103
Operand 1 of TRUNCSTORE can be any of integer and floating point types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24989 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 07:30:30 +00:00
Evan Cheng
351dc967ba
Added special flag node FLAG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24934 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:25:14 +00:00
Chris Lattner
5c82f4dcdc
add some nodes, forgot to commit this last night :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24901 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 16:22:46 +00:00
Evan Cheng
a5386b0823
Added X86 readport patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24879 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 07:38:38 +00:00
Evan Cheng
898101c15f
X86 conditional branch support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 23:12:38 +00:00
Chris Lattner
737f631532
add a node, for completeness
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24819 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:05:21 +00:00
Nate Begeman
6aa45292c6
Since extload can also be used by FP, split STDIntExtLoad into two parts,
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one for use with extload, one for use with sextload and zextload, which
are integer only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24814 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:48:48 +00:00
Chris Lattner
0b218434cc
add truncstore
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:29 +00:00
Jim Laskey
f5395cee6a
Added source file/line correspondence for dwarf (PowerPC only at this point.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 22:45:29 +00:00
Evan Cheng
cb17bac3a3
* Promote all 1 bit entities to 8 bit.
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* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 19:49:23 +00:00
Evan Cheng
543b4583d3
Added constpool, frameindex, and externalsym nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24723 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:29:48 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
2b52426441
Fixed extload type profile. The 4th operand is a ValueType node with type
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OtherVT, it cannot be compare to type of 1st operand which is an integer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24713 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:40:54 +00:00
Evan Cheng
3d2331dba7
Added sextld + zextld DAG nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24703 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:01 +00:00
Nate Begeman
993aeb2ed9
Prepare support for AltiVec multiply, divide, and sqrt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24700 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 22:55:22 +00:00
Chris Lattner
d2c339cca7
Fix typo :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 18:43:13 +00:00
Chris Lattner
3aed79eadb
add selectcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 08:35:54 +00:00
Chris Lattner
84384546e2
Realize the constant pool & global addrs must always be ptr type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:04 +00:00
Nate Begeman
28a6b02626
Add support for TargetConstantPool nodes to the dag isel emitter, and use
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them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
b612ff9569
Use SDTCisPtrTy type property for store address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:59:36 +00:00
Evan Cheng
b51a059b2c
* Added X86 store patterns.
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* Added X86 dec patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Chris Lattner
d8fe3b3272
Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
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must be a pointer. This removes a type check out of the code generated by
tblgen for load matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:58:42 +00:00
Evan Cheng
f20da7e1a7
Added support for ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 04:28:48 +00:00
Chris Lattner
68bfd9c1e8
On some targets (e.g. X86), shift amounts are not the same as the value
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being shifted. Don't assume they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:37:26 +00:00
Evan Cheng
f8ac814957
* Added instruction property hasCtrlDep for those which r/w control-flow
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chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Chris Lattner
db40dc2d63
Add globaladdress and targetglobaladdress nodes for dag patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24389 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:20:15 +00:00
Duraid Madina
5966955445
add support for SELECT to TargetSelectionDAG.td, add support for
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selecting ints to IA64, and a few other ia64 bits and pieces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:37:18 +00:00
Duraid Madina
e2fd9e2d9d
add support for int->FP and FP->int ops, and add ia64 patterns for these
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:07:25 +00:00
Chris Lattner
1f426deade
Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments
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to make it easy to use them. This lets you write patterns like:
(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))
and stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24009 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:00:25 +00:00
Chris Lattner
978982628a
Add undef
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 21:03:14 +00:00
Chris Lattner
eae6d648da
Use a literal to define ineg instead of immzero
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23851 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 23:30:37 +00:00
Andrew Lenharth
d684e1a64d
add cttz and ctpop
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23848 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 19:38:11 +00:00
Chris Lattner
444215dddc
add the integer truncate/extension operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:40:20 +00:00
Chris Lattner
13664a6194
add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:10 +00:00
Chris Lattner
17f2cf05b3
Pull DAG ISel generation nodes out of the PowerPC backend to where they
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can be used by other targets. For those targets that want to use it,
have at. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:00:30 +00:00