Commit Graph

73191 Commits

Author SHA1 Message Date
Chris Lattner
b85e4eba85 rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is
for pre-2.9 bitcode files.  We keep x86 unaligned loads, movnt, crc32, and the
target indep prefetch change.

As usual, updating the testsuite is a PITA.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 06:05:24 +00:00
Cameron Zwarich
6be41eb7f0 Fix an invalid bitcast crash that occurs when doing a partial memset of a vector
alloca. Fixes part of <rdar://problem/9580800>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 05:47:49 +00:00
Cameron Zwarich
aab3ea244c Remove a pointless assignment. Nothing checks the value of VectorTy anymore now
unless ScalarKind is Vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 05:47:45 +00:00
Jakob Stoklund Olesen
c6596e2edc Use the correct comparator to avoid depending on pointer values.
This should fix the Linux buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 05:44:55 +00:00
Jakob Stoklund Olesen
abdbc84b4e Store CodeGenRegisters as pointers so they won't be reallocated.
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 04:26:06 +00:00
Jakob Stoklund Olesen
54c47c1ce9 Remove MethodProtos/MethodBodies and allocation_order_begin/end.
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.

The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.

It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 03:08:20 +00:00
Jakob Stoklund Olesen
4b2a174e21 Delete unneeded allocation order override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 02:30:02 +00:00
Jakob Stoklund Olesen
0a074ed3ef Switch ARM to using AltOrders instead of MethodBodies.
This slightly changes the GPR allocation order on Darwin where R9 is not
a callee-saved register:

Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11
After:  %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 01:14:46 +00:00
Jakob Stoklund Olesen
e8c38ca3b5 Switch x86 to using AltOrders instead of MethodBodies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 01:14:43 +00:00
Galina Kistanova
a566ec94e6 Moved to the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:59:37 +00:00
Jakob Stoklund Olesen
3b6434e360 Reserve D16-D13 on subtargets that don't support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:53:27 +00:00
Jakob Stoklund Olesen
b4c704877d Provide AltOrders for specifying alternative allocation orders.
A register class can define AltOrders and AltOrderSelect instead of
defining method protos and bodies. The AltOrders lists can be defined
with set operations, and TableGen can verify that the alternative
allocation orders only contain valid registers.

This is currently an opt-in feature, and it is still possible to
override allocation_order_begin/end. That will not be true for long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:50:49 +00:00
Bill Wendling
edb15d6872 * Override the "EmitBytes" function, since it can sneak values in that way.
* Make this used only if CFI is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:19:35 +00:00
Eric Christopher
a3071455e5 Fix UMULO support for 2x register width to allow the full
range without a libcall to a new mulo<mode> libcall
that we'd have to create.

Finishes the rest of rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:09:57 +00:00
Bill Wendling
ccfae86da1 Remove false assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133314 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 23:42:01 +00:00
Jakob Stoklund Olesen
bed9711ca8 Only call TRI::getRawAllocationOrder to resolve a target-dependent hint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 23:26:52 +00:00
Jakob Stoklund Olesen
8936b94776 Zap the last reference to allocation_order_begin().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 23:17:13 +00:00
Jakob Stoklund Olesen
aad458d57f SI, DI, BP, and SP don't have 8-bit sub-registers in x86 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 23:15:00 +00:00
Eric Christopher
5e687ac615 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 22:35:59 +00:00
Matt Beaumont-Gay
d3e724aeaf Fix -Asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133305 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 22:21:12 +00:00
Chad Rosier
66638b2333 Revert r133285. Causing odd failures on Dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 22:08:25 +00:00
Bill Wendling
50cb96931a Disable for another investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 21:44:15 +00:00
Devang Patel
c013699027 Set debug loc for new preheader's terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 21:36:44 +00:00
Bill Wendling
30507ef3c3 Support only DwarfCFI or SjLj exception handling in LSDA decoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 21:31:43 +00:00
Bill Wendling
5ba89837d7 SjLj exception handling LSDA decoding support wasn't represented correctly. Use
the correct values, etc. In particular, the exception handling type is SjLj, not
ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 21:29:06 +00:00
Bill Wendling
2fb86a8fe6 Disable to investigate ARM failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 21:09:50 +00:00
Bill Wendling
e266ce6c6e Use the verbose asm flag instead of a new flag for decoding the LSDA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:55:01 +00:00
Nadav Rotem
da26ad501b Fix a bug in the type-lowering of integer-promoted elements. Add a check that
the newly created simple type is valid before checking its legality.
Re-commit the test file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:54:12 +00:00
Evan Cheng
6d6c55bc27 Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:47:21 +00:00
Eric Christopher
362fee90b9 Lower multiply with overflow checking to __mulo<mode>
calls if we haven't been able to lower them any
other way.

Fixes rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:41:29 +00:00
Bill Wendling
916a94b870 Add an option that allows one to "decode" the LSDA.
The LSDA is a bit difficult for the non-initiated to read. Even with comments,
it's not always clear what's going on. This wraps the ASM streamer in a class
that retains the LSDA and then emits a human-readable description of what's
going on in it.

So instead of having to make sense of:

Lexception1:
        .byte   255
        .byte   155
        .byte   168
        .space  1
        .byte   3
        .byte   26
Lset0 = Ltmp7-Leh_func_begin1
      .long     Lset0
Lset1 = Ltmp812-Ltmp7
      .long     Lset1
Lset2 = Ltmp913-Leh_func_begin1
      .long     Lset2
      .byte     3
Lset3 = Ltmp812-Leh_func_begin1
      .long     Lset3
Lset4 = Leh_func_end1-Ltmp812
      .long     Lset4
      .long     0
      .byte     0
      .byte     1
      .byte     0
      .byte     2
      .byte     125
      .long     __ZTIi@GOTPCREL+4
      .long     __ZTIPKc@GOTPCREL+4

you can read this instead:

## Exception Handling Table: Lexception1
##  @LPStart Encoding: omit
##    @TType Encoding: indirect pcrel sdata4
##        @TType Base: 40 bytes
## @CallSite Encoding: udata4
## @Action Table Size: 26 bytes

## Action 1:
##   A throw between Ltmp7 and Ltmp812 jumps to Ltmp913 on an exception.
##     For type(s):  __ZTIi@GOTPCREL+4 __ZTIPKc@GOTPCREL+4
## Action 2:
##   A throw between Ltmp812 and Leh_func_end1 does not have a landing pad.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:35:21 +00:00
Stuart Hastings
3761c34e03 Relocate NUW test to cover all binary ops in a dynamic alloca expr.
Followup to 132926.  rdar://problem/9265821


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133285 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:21:52 +00:00
Galina Kistanova
ed6fa188c4 est 2008-06-04-indirectmem.ll is X86-specific. Move to X86 folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133275 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:26:23 +00:00
Chris Lattner
4f6bab98c5 Drop the "2" suffix on some enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:17:37 +00:00
Chris Lattner
96a74c57d9 remove support for a bunch of obsolete instruction encodings
and other backward compatibility hacks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:09:11 +00:00
Benjamin Kramer
738f05aa90 Remove a useless copy of MCELFStreamer. Patch by Logan Chien!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:05:30 +00:00
Jakub Staszak
981d82674c getSuccWeight returns now default 0 if Weights vector is empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133271 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:00:21 +00:00
Chris Lattner
799a58a55e missed a file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133270 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:56:00 +00:00
Chris Lattner
9d61dd9a08 Remove some "2" suffixes from the metadata enums now that "1" is gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:50:30 +00:00
Chris Lattner
020a5a449f remove bitcode reader support for LLVM 2.7 metadata encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133268 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:48:53 +00:00
Chris Lattner
b0884ddf70 remove another old and dead hunk of code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:40:18 +00:00
Chris Lattner
a16546a70b Stop accepting and ignoring attributes in function types. Attributes are applied
to functions and call/invokes, not to types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:37:13 +00:00
Jakub Staszak
a6591969ff Allow empty Weights vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133265 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:30:10 +00:00
Roman Divacky
951cd021c1 Fix a few places where 32bit instructions/registerset were used on PPC64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 15:21:10 +00:00
Rafael Espindola
33ded7333d Test for previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133256 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 14:16:17 +00:00
Rafael Espindola
db3983bd76 Two fixes relating to debug value:
* We should change the generated code because of a debug use.
* Avoid creating debug uses of undef, as they become a kill.
Test to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133255 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 13:59:43 +00:00
Jay Foad
566a4acfef Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 13:36:06 +00:00
Justin Holewinski
707fd44038 PTX: Adjust rounding modes
* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 12:12:42 +00:00
NAKAMURA Takumi
f1b7e94add Don't force remove config.cache on reconfiguration.
config.cache will be used by the person who specifies '-C' to configure.
config.cache's inconsistency should be responsible to him.

Re-configuration would spend so much on cygming without '-C', esp. cygwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 11:08:09 +00:00
Nick Lewycky
1d665c9a9f When promoting an alloca to registers discard any lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133251 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 10:09:00 +00:00