Commit Graph

75215 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
ba059464c3 [x86] Add vector @llvm.ctpop intrinsic custom lowering
Currently, when ctpop is supported for scalar types, the expansion of
@llvm.ctpop.vXiY uses vector element extractions, insertions and individual
calls to @llvm.ctpop.iY. When not, expansion with bit-math operations is used
for the scalar calls.

Local haswell measurements show that we can improve vector @llvm.ctpop.vXiY
expansion in some cases by using a using a vector parallel bit twiddling
approach, based on:

v = v - ((v >> 1) & 0x55555555);
v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
v = ((v + (v >> 4) & 0xF0F0F0F)
v = v + (v >> 8)
v = v + (v >> 16)
v = v & 0x0000003F
(from http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel)

When scalar ctpop isn't supported, the approach above performs better for
v2i64, v4i32, v4i64 and v8i32 (see numbers below). And even when scalar ctpop
is supported, this approach performs ~2x better for v8i32.

Here, x86_64 implies -march=corei7-avx without ctpop and x86_64h includes ctpop
support with -march=core-avx2.

== [x86_64h - new]
v8i32: 0.661685
v4i32: 0.514678
v4i64: 0.652009
v2i64: 0.324289
== [x86_64h - old]
v8i32: 1.29578
v4i32: 0.528807
v4i64: 0.65981
v2i64: 0.330707

== [x86_64 - new]
v8i32: 1.003
v4i32: 0.656273
v4i64: 1.11711
v2i64: 0.754064
== [x86_64 - old]
v8i32: 2.34886
v4i32: 1.72053
v4i64: 1.41086
v2i64: 1.0244

More work for other vector types will come next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 19:45:43 +00:00
Juergen Ributzka
ddba295642 Remove unused header. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224722 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 19:09:15 +00:00
Peter Zotov
7bfc61dfe3 [C API] Expose LLVMGetGlobalValueAddress and LLVMGetFunctionAddress.
Patch by Ramkumar Ramachandra <artagnon@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224720 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 18:53:11 +00:00
Quentin Colombet
7b88565334 [CodeGenPrepare] Handle properly the promotion of operands when this does not
generate instructions.

Fixes PR21978.
Related to <rdar://problem/18310086>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224717 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 18:11:52 +00:00
Elena Demikhovsky
c1aa521fb4 AVX-512: Added all forms of BLENDM instructions,
intrinsics, encoding tests for AVX-512F and skx instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 13:52:48 +00:00
Karthik Bhat
0c2590a266 Lower multiply-negate operation to mneg on AArch64
This patch pattern matches code such as-
neg	 w8, w8
mul	 w8, w9, w8
to
mneg	 w8, w8, w9

Review: http://reviews.llvm.org/D6754



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 13:38:58 +00:00
Rafael Espindola
ada5f24b5f The leak detector is dead, long live asan and valgrind.
In resent times asan and valgrind have found way more memory management bugs
in llvm than the special purpose leak detector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224703 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-22 13:00:36 +00:00
Saleem Abdulrasool
11dd9c3d55 CodeGen: minor style tweaks to SSP
Clean up some style related things in the StackProtector CodeGen.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224693 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-21 21:52:38 +00:00
Craig Topper
b10afb51d6 [X86] Add hasSideEffects = 0 to CALLpcrel16. This matches what is inferred from patterns for the 32-bit version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224692 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-21 20:05:06 +00:00
Matt Arsenault
d796cf2e01 Enable (sext x) == C --> x == (trunc C) combine
Extend the existing code which handles this for zext. This makes this
more useful for targets with ZeroOrNegativeOne BooleanContent and
obsoletes a custom combine SI uses for i1 setcc (sext(i1), 0, setne)
since the constant will now be shrunk to i1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224691 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-21 16:48:42 +00:00
Craig Topper
b8f8f2dbed [X86] Swap operand order in Intel syntax on a bunch of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224687 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 23:05:59 +00:00
Craig Topper
a9bae8c3da [X86] Swap operand order of imul aliases in Intel syntax. Also disable printing of the alias instead of the real instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224686 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 23:05:57 +00:00
Craig Topper
0c8f0f0403 [X86] Remove '*' from asm strings in far call/jump aliases for Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 23:05:55 +00:00
Craig Topper
58331b67cb [X86] Don't swap the order of segment and offset in immediate form of far call/jump in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 23:05:52 +00:00
Saleem Abdulrasool
281f568720 CodeGen: constify and use range loop for SSP
Use range-based for loop and constify the iterators.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224683 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 21:37:51 +00:00
Saleem Abdulrasool
fc317b6e7b ARM: further improve deprecated diagnosis (LDM)
The ARM ARM states:
  LDM/LDMIA/LDMFD:
    The SP can be in the list. However, ARM deprecates using these instructions
    with SP in the list.

    ARM deprecates using these instructions with both the LR and the PC in the
    list.

  LDMDA/LDMFA/LDMDB/LDMEA/LDMIB/LDMED:
    The SP can be in the list. However, instructions that include the SP in the
    list are deprecated.

    Instructions that include both the LR and the PC in the list are deprecated.

  POP:
    The SP can only be in the list before ARMv7. ARM deprecates any use of ARM
    instructions that include the SP, and the value of the SP after such an
    instruction is UNKNOWN.

    ARM deprecates the use of this instruction with both the LR and the PC in
    the list.

Attempt to diagnose use of deprecated forms of these instructions.  This mirrors
the previous changes to diagnose use of the deprecated forms of STM in ARM mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224682 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 20:25:36 +00:00
Craig Topper
ae39073d99 [X86] Immediate forms of far call/jump are not valid in x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 07:43:27 +00:00
David Majnemer
854a37649a InstCombine: Squash an icmp+select into bitwise arithmetic
(X & INT_MIN) == 0 ? X ^ INT_MIN : X  into  X | INT_MIN
(X & INT_MIN) != 0 ? X ^ INT_MIN : X  into  X & INT_MAX

This fixes PR21993.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224676 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 04:45:35 +00:00
David Majnemer
821c6f765a InstSimplify: Don't bother if getScalarSizeInBits returns zero
getScalarSizeInBits returns zero when the comparison operands are not
integral.  No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 04:45:33 +00:00
David Majnemer
f666c0549e Simplify the code
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224673 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 03:29:59 +00:00
David Majnemer
9cd99a0724 InstSimplify: Optimize away pointless comparisons
(X & INT_MIN) ? X & INT_MAX : X  into  X & INT_MAX
(X & INT_MIN) ? X : X & INT_MAX  into  X
(X & INT_MIN) ? X | INT_MIN : X  into  X
(X & INT_MIN) ? X : X | INT_MIN  into  X | INT_MIN

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 03:04:38 +00:00
Chandler Carruth
93e03df3cf [SROA] Run clang-format over the entire SROA pass as I wrote it before
much of the glory of clang-format, and now any time I touch it I risk
introducing formatting changes as part of a functional commit.

Also, clang-format is *way* better at formatting my code than I am.
Most of this is a huge improvement although I reverted a couple of
places where I hit a clang-format bug with lambdas that has been filed
but not (fully) fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 02:39:18 +00:00
Matthias Braun
4acc514cc2 LiveIntervalAnalysis: No kill flags for partially undefined uses.
We must not add kill flags when reading a vreg with some undefined
subregisters, if subreg liveness tracking is enabled.  This is because
the register allocator may reuse these undefined subregisters for other
values which are not killed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 01:54:50 +00:00
Matthias Braun
1f6bcf1b85 LiveIntervalAnalysis: cleanup addKills(), NFC
- Use more const modifiers
- Use references for things that can't be nullptr
- Improve some variable names

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 01:54:48 +00:00
Eric Christopher
2081883c81 Remove unused variable and initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224655 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-20 00:07:09 +00:00
Eric Christopher
adddca7b18 Remove unused variable, initializer, and accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224650 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 23:46:53 +00:00
Matt Arsenault
a0fae51f11 R600: Remove outdated comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 23:29:13 +00:00
Elena Demikhovsky
573b762b68 Masked load and store codegen - fixed 128-bit vectors
The codegen failed on 128-bit types on AVX2.
I added patterns and in td files and tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224647 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 23:27:57 +00:00
Matt Arsenault
7fc3bdab6a R600/SI: Only form min/max with 1 use.
If the condition is used for something else, this increases
the number of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 23:15:30 +00:00
Reid Kleckner
b60b7360f5 EH: Sink computation of local PadMap variable into function that uses it
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224635 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:30:08 +00:00
Kevin Enderby
5ebdee51db Add printing the LC_ROUTINES load commands with llvm-objdump’s -private-headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224627 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:25:22 +00:00
Reid Kleckner
0f85d54670 Add the ExceptionHandling::MSVC enumeration
It is intended to be used for a family of personality functions that
have similar IR preparation requirements. Typically when interoperating
with MSVC personality functions, bits of functionality need to be
outlined from the main function into helper functions. There is also
usually more than one landing pad per invoke, which does not match the
LLVM IR landingpad representation.

None of this is implemented yet. This change just adds a new enum that
is active for *-windows-msvc and delegates to the EH removal preparation
pass.  No functionality change for other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224625 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:19:48 +00:00
Sanjay Patel
9ccbf1a260 Model sqrtss as a binary operation with one source operand tied to the destination (PR14221)
This is a continuation of r167064 ( http://llvm.org/viewvc/llvm-project?view=revision&revision=167064 ).
That patch started to fix PR14221 ( http://llvm.org/bugs/show_bug.cgi?id=14221 ), but it was not completed. 

Differential Revision: http://reviews.llvm.org/D6330



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:16:28 +00:00
Tom Stellard
2516f059db R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions
The constant bus restrictions only apply to VALU instructions.  This
enables SIFoldOperands to fold immediates into SALU instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224623 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:15:37 +00:00
Tom Stellard
87bd2fa24b R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
mubuf instructions now define the soffset field using the SCSrc_32
register class which indicates that only SGPRs and inline constants
are allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224622 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:15:30 +00:00
Yaron Keren
8cc9040b8e Remove isSubroutineType test for isCompositeType, getTag() is enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 22:15:09 +00:00
Kevin Enderby
728b8cfc76 Add printing the LC_SUB_CLIENT load command with llvm-objdump’s -private-headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224616 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 21:06:24 +00:00
Colin LeMahieu
bdfe60c796 [Hexagon] Removing old variants of instructions and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 20:29:29 +00:00
Sanjay Patel
3c3cd10928 merge consecutive stores of extracted vector elements
Add a path to DAGCombiner::MergeConsecutiveStores() 
to combine multiple scalar stores when the store operands
are extracted vector elements. This is a partial fix for
PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ).

For the new test case, codegen improves from:

   vmovss  %xmm0, (%rdi)
   vextractps      $1, %xmm0, 4(%rdi)
   vextractps      $2, %xmm0, 8(%rdi)
   vextractps      $3, %xmm0, 12(%rdi)
   vextractf128    $1, %ymm0, %xmm0
   vmovss  %xmm0, 16(%rdi)
   vextractps      $1, %xmm0, 20(%rdi)
   vextractps      $2, %xmm0, 24(%rdi)
   vextractps      $3, %xmm0, 28(%rdi)
   vzeroupper
   retq

To:

   vmovups	%ymm0, (%rdi)
   vzeroupper
   retq

Patch reviewed by Nadav Rotem.

Differential Revision: http://reviews.llvm.org/D6698



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 20:23:41 +00:00
Colin LeMahieu
579ff45d4d [Hexagon] Adding bit extraction and table indexing instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 20:01:08 +00:00
Colin LeMahieu
0d6fdaeaad [Hexagon] Adding bit insertion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 19:54:38 +00:00
Colin LeMahieu
84b8baf924 [Hexagon] Adding more xtype shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224608 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 19:51:35 +00:00
Kevin Enderby
2ef4e25dd1 Add printing the LC_SUB_LIBRARY load command with llvm-objdump’s -private-headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224607 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 19:48:16 +00:00
Colin LeMahieu
424493a8fc [Hexagon] Adding xtype shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 19:34:50 +00:00
Colin LeMahieu
e403ffc801 [Hexagon] Adding transfers to and from control registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224599 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 19:06:32 +00:00
Colin LeMahieu
786e40311e [Hexagon] Adding doubleregs for control registers. Renaming control register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 18:56:10 +00:00
Frederic Riss
7e5492d27d [DebugInfo] Move all DWARF headers to the public include directory.
dsymutil needs access to DWARF specific inforamtion, the small DIContext
wrapper isn't sufficient. Other DWARF consumers might want to use it too
(I'm looking at you lldb).

Differential Revision: http://reviews.llvm.org/D6694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224594 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 18:26:33 +00:00
Tilmann Scheller
409585877a [BBVectorize] Remove two more redundant assignments.
Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 17:21:38 +00:00
Tilmann Scheller
14ef1a43c2 [BBVectorize] Remove redundant assignment.
Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224589 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 17:13:12 +00:00
Bruno Cardoso Lopes
06833ca7c1 Reapply: [InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr
The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. Also, fix code to also return the modified switch when only
the truncation is performed.

This fixes an assertion crash.

Differential Revision: http://reviews.llvm.org/D6644

rdar://problem/19191835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224588 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-19 17:12:35 +00:00