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ba567d670d
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14065 Commits

Author SHA1 Message Date
Eli Friedman
ba567d670d Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:26:09 +00:00
Jim Grosbach
72335d55d9 Thumb2 parsing and encoding for ADC(register). 
Also add instruction aliases for non-.w versions of SBC since they're the
same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138871 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:23:08 +00:00
Eli Friedman
4d3f329453 64-bit atomic cmpxchg for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:52:22 +00:00
David Greene
d92e2e4f88 Compress Repeated Byte Output 
Emit a repeated sequence of bytes using .zero.  This saves an enormous
amount of asm file space for certain programs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138864 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:30:56 +00:00
Jim Grosbach
0f3abd8d68 Tweak Thumb1 ADD encoding selection a bit. 
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:07:33 +00:00
Benjamin Kramer
31d27ce568 This test requires sse, otherwise x87 ops will block tailcall optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 16:49:05 +00:00
Bruno Cardoso Lopes
57d6a5e491 - Move all MOVSS and MOVSD patterns close to their definitions 
- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
  and update a testcase to check it properly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138851 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 03:04:20 +00:00
Evan Cheng
0899f5c62d Fix (movhps load) lowering / pattern to match more cases. rdar://10050549 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 02:05:24 +00:00
Eli Friedman
3d93861c23 Some minor cleanups for r138845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138846 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:41:05 +00:00
Eli Friedman
2bdffe4882 Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:31:29 +00:00
Benjamin Kramer
8f00ffce50 Fix test typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138843 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:02:59 +00:00
Rafael Espindola
f940a1a869 Remove the old tail duplication pass. It is not used and is unable to update 
ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 23:03:45 +00:00
Owen Anderson
eaca928a37 Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:58:27 +00:00
Owen Anderson
21df36c57a Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:15:17 +00:00
Owen Anderson
a7710edd98 Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:10:03 +00:00
Owen Anderson
391ac65377 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:03:20 +00:00
Rafael Espindola
6cac2025da Add a triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:19:37 +00:00
Owen Anderson
1333abc785 Remove empty file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:17:20 +00:00
Owen Anderson
54c4735db3 Speculatively revert r138809 in an attempt to fix DragonEgg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138829 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:11:06 +00:00
Owen Anderson
3318d9c27d Port Thumb2 assembler tests over to disassembler tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138822 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 20:03:11 +00:00
Rafael Espindola
b0bf8935ee Some test code to check if correct code is being generated. 
Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:51:29 +00:00
Owen Anderson
6e4be237b0 When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138809 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 18:51:55 +00:00
Andrew Trick
7c12837916 Lit option for ignoring stderr output. 
This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 17:42:33 +00:00
Roman Divacky
0aaa9195b5 Set CR1EQ only when lowering vararg floating arguments (not any vararg 
arguments as before), unset CR1EQ otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 17:04:16 +00:00
Craig Topper
3daa5c29d4 Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:09:35 +00:00
Evan Cheng
342e3161d9 Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 
register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.

When a i64 sub is expanded to subc + sube.
  libcall #1
     \
      \        subc 
       \       /  \
        \     /    \
         \   /    libcall #2
          sube

If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.

  subc
   |
  libcall #2
   |
  libcall #1
   |
  sube

However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.

The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.

rdar://10019576


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 01:34:54 +00:00
Owen Anderson
694e0ffb8a Add missing encoding information for some of the GPR<->FP register moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:15:25 +00:00
Jim Grosbach
abd3f60859 Remove redundant tests from XFAIL'ed test file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:04:04 +00:00
Jim Grosbach
a01e12499f Thumb2 assembly parsing and encoding support for ADC(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:01:38 +00:00
Jim Grosbach
056cb4c0f6 Remove test file. Superceded by other more exhaustive tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:00:19 +00:00
Jim Grosbach
f8e1e3e729 Thumb2 parsing and encoding for IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 22:24:09 +00:00
Kevin Enderby
fff64ca9cf Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 22:06:28 +00:00
Eli Friedman
f3704769bb Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 21:15:46 +00:00
Bill Wendling
6af6824eb4 Update tests to new EH model. Add landingpad instructions to landing pads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 20:39:23 +00:00
Nadav Rotem
89879ec76b Fixes following the CR by Chris and Duncan: 
Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 19:58:36 +00:00
Owen Anderson
0da10cf44d Improve handling of #-0 offsets for many more pre-indexed addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 19:36:44 +00:00
Owen Anderson
50e2dedb51 Add testcase for r138746. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 18:02:40 +00:00
Owen Anderson
63553c77cd Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 17:17:09 +00:00
Duncan Sands
fd9c4f76f4 Fix PR5329: pay attention to constructor/destructor priority 
when outputting them.  With this, the entire LLVM testsuite
passes when built with dragonegg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138724 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-28 13:17:22 +00:00
Nadav Rotem
be6ceb6ebc Bitcasts are transitive. Bitcast-Bitcast-X becomes Bitcast-X. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-28 11:51:08 +00:00
Andrew Trick
d326d3b3ef Reverted r138652, valgrind doesn't understand obj:*/tblgen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138703 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-27 06:17:30 +00:00
Bill Wendling
df77a71790 Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If 
things to disasterously over night, this can be reverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138702 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-27 06:11:03 +00:00
Bill Wendling
234e43a888 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138699 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-27 04:53:41 +00:00
Bill Wendling
f2cf25b212 Cannot have an llvm.eh.exception call in a non-landing pad block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138698 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-27 04:53:28 +00:00
Andrew Trick
0005cc7a0a Excluding ARM JIT tests until someone can fix this compilation path. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138676 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 23:39:30 +00:00
Owen Anderson
f1eab597b2 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 23:32:08 +00:00
Owen Anderson
d7568e1c35 Correct encoding of BL with immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 22:54:51 +00:00
Eli Friedman
43f51aeca8 Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:21:21 +00:00
Bill Wendling
1f4a32f5ac Revert r138606 until LowerInvoke has been converted to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:11:23 +00:00
Owen Anderson
9ab0f25fc1 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 20:43:14 +00:00