Commit Graph

209 Commits

Author SHA1 Message Date
Chris Lattner
0c8fbe33a4 Allow targets to custom legalize leaf nodes like GlobalAddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24387 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 06:41:44 +00:00
Chris Lattner
b9debbf54c Teach legalize about targetglobaladdress
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24385 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 05:52:24 +00:00
Andrew Lenharth
51b8d54922 continued readcyclecounter support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-11 16:47:30 +00:00
Chris Lattner
de202b3cda Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding
nodes to the graph.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24263 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09 23:47:37 +00:00
Chris Lattner
040c11c24e Handle the trivial (but common) two-op case more efficiently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24259 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09 18:48:57 +00:00
Chris Lattner
0d902a9c74 Allocate the right amount of memory for this vector up front.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 23:32:44 +00:00
Nate Begeman
b7f6ef12f6 Allow custom lowered FP_TO_SINT ops in the check for whether a larger
FP_TO_SINT is preferred to a larger FP_TO_UINT.  This seems to be begging
for a TLI.isOperationCustom() helper function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23992 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 23:47:25 +00:00
Nate Begeman
5dc897b0e4 Teach Legalize how to do something with EXTRACT_ELEMENT when the type of
the pair of elements is a legal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23804 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:06:56 +00:00
Nate Begeman
419f8b62f7 Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23776 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:27:41 +00:00
Chris Lattner
8136cdae60 Use getExtLoad here instead of getNode, as extloads produce two values. This
fixes a legalize failure on SPASS for itanium.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23747 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 20:24:07 +00:00
Nate Begeman
5054f16212 Relax the checking on zextload generation a bit, since as sabre pointed out
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23720 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 01:12:21 +00:00
Chris Lattner
9ad8481cfb When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-13 21:44:47 +00:00
Chris Lattner
4c8f8f0481 Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-13 20:07:41 +00:00
Nate Begeman
144ff660e6 Add support to Legalize for expanding i64 sextload/zextload into hi and lo
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23711 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-13 17:15:37 +00:00
Nate Begeman
ded4963ab9 Move some Legalize functionality over to the DAGCombiner where it belongs.
Kill some dead code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-13 03:11:28 +00:00
Chris Lattner
cf5c79b34f silence a bogus GCC warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23646 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 17:39:10 +00:00
Chris Lattner
32fca00a23 Make the legalizer completely non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23642 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 01:20:27 +00:00
Nate Begeman
829cb81806 Remove some bad code from Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23640 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-05 21:44:10 +00:00
Nate Begeman
1aa1972c63 Fix some faulty logic in the libcall inserter.
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.

Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.

Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end.  This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.

This is a better fix that reverting to the workaround committed earlier
today.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23620 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 02:10:55 +00:00
Nate Begeman
27d404ccd1 Add back a workaround that fixes some breakages from chris's last change.
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there.  Still tracking this down...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23617 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 00:37:37 +00:00
Chris Lattner
ab510a76d6 Fix a problem where the legalizer would run out of stack space on extremely
large basic blocks because it was purely recursive.  This switches it to an
iterative/recursive hybrid.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23596 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 17:49:46 +00:00
Chris Lattner
473a99073c Fix two bugs in my patch earlier today that broke int->fp conversion on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 06:44:39 +00:00
Chris Lattner
01b3d73c20 Add FP versions of the binary operators, keeping the int and fp worlds seperate.
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23504 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:28:18 +00:00
Chris Lattner
13d58e71b7 Allow targets to say they don't support truncstore i1 (which includes a mask
when storing to an 8-bit memory location), as most don't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23303 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-10 00:20:18 +00:00
Chris Lattner
6fdcb250d5 Clean up some code from the last checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23229 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 20:32:45 +00:00
Chris Lattner
99c25b86aa Fix a bug in legalize where it would emit two calls to libcalls that return
i64 values on targets that need that expanded to 32-bit registers.  This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 20:26:58 +00:00
Chris Lattner
08951a32fb Make sure to legalize assert[zs]ext's operand correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23208 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 01:15:01 +00:00
Chris Lattner
13c78e2e5f legalize ANY_EXTEND appropriately
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23204 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 00:18:10 +00:00
Chris Lattner
50ec897904 Allow targets to custom expand shifts that are too large for their registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23173 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-31 19:01:53 +00:00
Chris Lattner
cc0675a4be Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result
to SHIFT_PARTS nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23151 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 17:21:17 +00:00
Chris Lattner
ec176e30d6 Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,
at least tends to expose problems elsewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23149 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 16:56:19 +00:00
Nate Begeman
56eb86806d Add support for AssertSext and AssertZext, folding other extensions with
them.  This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.

Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values.  this allows us to codegen

int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
        mulhw r3, r4, r3
        blr

instead of:
_mulhs:
        mulhwu r2, r4, r3
        srawi r5, r3, 31
        mullw r5, r4, r5
        add r2, r2, r5
        srawi r4, r4, 31
        mullw r3, r4, r3
        add r3, r2, r3
        blr

with a similar improvement on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-30 02:44:00 +00:00
Andrew Lenharth
5e3efbc2ca Some of us cared about the the promote path
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-29 20:46:51 +00:00
Chris Lattner
507f752f6e Fix an infinite loop on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-29 17:30:00 +00:00
Chris Lattner
eb150d7d1f Nate noticed that Andrew never did this. This fixes PR600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23110 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 22:50:40 +00:00
Chris Lattner
5839bf2b3b Change ConstantPoolSDNode to actually hold the Constant itself instead of
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:15:30 +00:00
Chris Lattner
d7050a9c50 the 5th operand is the 4th number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23074 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 00:43:46 +00:00
Chris Lattner
23004e5f21 Add support for targets that want to custom expand select_cc in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23071 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 00:23:59 +00:00
Chris Lattner
07dffd6af6 Allow LowerOperation to return a null SDOperand in case it wants to lower
some things given to it, but not all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23070 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 00:14:16 +00:00
Chris Lattner
c9c60f6429 Start using isOperationLegal and isTypeLegal to simplify the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23012 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 16:35:28 +00:00
Nate Begeman
b942a3dd5f Teach Legalize how to turn setcc into select_cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22977 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 04:29:48 +00:00
Chris Lattner
550b1e59c4 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 18:03:09 +00:00
Jim Laskey
cb6682fa44 Culling out use of unions for converting FP to bits and vice versa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:34:49 +00:00
Jim Laskey
02659d2363 Switched to using BitsToDouble for int_to_float to avoid aliasing problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22831 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 17:42:52 +00:00
Jim Laskey
491dfa88e4 Change hex float constants for the sake of VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22828 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 09:44:59 +00:00
Jim Laskey
6269ed125f Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the
legalizer.  PowerPC now uses this expansion instead of ISel version.

Example:

// signed integer to double conversion
double f1(signed x) {
  return (double)x;
}

// unsigned integer to double conversion
double f2(unsigned x) {
  return (double)x;
}

// signed integer to float conversion
float f3(signed x) {
  return (float)x;
}

// unsigned integer to float conversion
float f4(unsigned x) {
  return (float)x;
}


Byte Code:

internal fastcc double %_Z2f1i(int %x) {
entry:
        %tmp.1 = cast int %x to double          ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc double %_Z2f2j(uint %x) {
entry:
        %tmp.1 = cast uint %x to double         ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc float %_Z2f3i(int %x) {
entry:
        %tmp.1 = cast int %x to float           ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc float %_Z2f4j(uint %x) {
entry:
        %tmp.1 = cast uint %x to float          ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc double %_Z2g1i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        ret double %tmp.14
}

internal fastcc double %_Z2g2j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        ret double %tmp.9
}

internal fastcc float %_Z2g3i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        %tmp.16 = cast double %tmp.14 to float          ; <float> [#uses=1]
        ret float %tmp.16
}

internal fastcc float %_Z2g4j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        %tmp.11 = cast double %tmp.9 to float           ; <float> [#uses=1]
        ret float %tmp.11
}


PowerPC Code:

        .machine ppc970


        .const
        .align  2
.CPIl1__Z2f1i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl1__Z2f1i_0)
        lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl2__Z2f2j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl2__Z2f2j_0)
        lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl3__Z2f3i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl3__Z2f3i_0)
        lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


        .const
        .align  2
.CPIl4__Z2f4j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl4__Z2f4j_0)
        lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22814 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 00:39:29 +00:00
Chris Lattner
d5d0f9bd20 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22806 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 21:55:35 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 19:49:35 +00:00
Chris Lattner
149c58ce0b Add some methods for dag->dag isel.
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 18:17:10 +00:00
Nate Begeman
2d56e72f09 Fix last night's PPC32 regressions by
1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 18:38:32 +00:00