Commit Graph

82059 Commits

Author SHA1 Message Date
Craig Topper
f0ae38ef2e Remove 'XXXRegisterClass' from tablegen output. Targets should use '&XXXRegClass' instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-21 01:49:25 +00:00
Jim Grosbach
8e3c17aabf ARM: tblgen'erate more NEON two-operand aliases.
VMUL and VEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:46:33 +00:00
Jakob Stoklund Olesen
0b35c35efc Fix PR12599.
The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:36:09 +00:00
Jim Grosbach
d83c9ea7d1 ARM: tblgen'erate more NEON two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:30:14 +00:00
Bill Wendling
c827834d49 Revert r155241, which is causing some breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155253 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 23:11:38 +00:00
Jakob Stoklund Olesen
8c48e4ff89 Make ISelPosition a local variable.
Now that multiple DAGUpdateListeners can be active at the same time,
ISelPosition can become a local variable in DoInstructionSelection.

We simply register an ISelUpdater with CurDAG while ISelPosition exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:50 +00:00
Jakob Stoklund Olesen
bc7d448f24 Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.

This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.

DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:08:46 +00:00
Eric Christopher
c61382b763 Extraneous semicolon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 22:07:50 +00:00
Bill Wendling
64c7af8900 If we discover all of the named structs in a module, then don't bother to
process any more Values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155241 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:56:24 +00:00
Jakob Stoklund Olesen
3429c7571e Print <def,read-undef> to avoid confusion.
The <undef> flag on a def operand only applies to partial register
redefinitions. Only print the flag when relevant, and print it as
<def,read-undef> to make it clearer what it means.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 21:45:33 +00:00
Andrew Trick
d06c2decc2 Added TargetRegisterInfo::getRegPressureSetName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155235 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:45:00 +00:00
Andrew Trick
7c0903a924 TableGen'd RegPressure: Added getPressureSetName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155234 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:44:58 +00:00
Bill Wendling
f4594a3302 Modify the sh-bang to run out-of-the-box for FreeBSDes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:31:44 +00:00
Andrew Trick
a30444a69c New and improved comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:24:33 +00:00
Andrew Trick
c0ccb8bb17 SparseSet: Add support for key-derived indexes and arbitrary key types.
This nicely handles the most common case of virtual register sets, but
also handles anticipated cases where we will map pointers to IDs.

The goal is not to develop a completely generic SparseSet
template. Instead we want to handle the expected uses within llvm
without any template antics in the client code. I'm adding a bit of
template nastiness here, and some assumption about expected usage in
order to make the client code very clean.

The expected common uses cases I'm designing for:
- integer keys that need to be reindexed, and may map to additional
  data
- densely numbered objects where we want pointer keys because no
  number->object map exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:28 +00:00
Andrew Trick
918f38ab24 misched: initialize BB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:21 +00:00
Andrew Trick
d4786e221c Allow converting MachineBasicBlock::iterator to const_iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:19 +00:00
Michael J. Spencer
1b0b45bd82 [docs] Update version number. I suggest that at some point we make the
build system generate this file with the proper version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 19:28:40 +00:00
Joel Jones
a9498a2ee6 Fix broken internal link.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155213 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:20:24 +00:00
Benjamin Kramer
b85b2d5a55 Kick off 3.2 cycle for LLVM trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155211 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:15:07 +00:00
Jim Grosbach
d8b3ed8f25 ARM: Update NEON assembly two-operand aliases.
Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases
for NEON instructions. There's still more to go, but this is a good chunk of
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:12:54 +00:00
Joel Jones
7605b29e27 Add debugging hints for when bugpoint does not suffice, specifically for instcombine and TargetLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 18:11:07 +00:00
Daniel Dunbar
4f7f40d00e [docs] Update Makefile for images removal.
- Also, drop the lines.gif background from doxygen, this URL was wrong on the
   llvm.org server anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155208 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 17:27:12 +00:00
Benjamin Kramer
34c53f3ac9 LLVM docs no longer contain images, don't try to install them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155206 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 17:14:26 +00:00
Jim Grosbach
2efd8acb3c Add documentation comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 16:29:46 +00:00
Joel Jones
93282d2430 Correct spelling, q.v. http://en.wikipedia.org/wiki/Bourne_shell
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155202 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 16:08:56 +00:00
Daniel Dunbar
9111fc1d11 [docs] Remove spurious or unused images.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 15:06:20 +00:00
Manuel Klimek
ee54010afe Removes json-bench from the test dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 13:45:49 +00:00
Gabor Greif
413ca0d34b effectively back out my last change (r155190)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 11:41:38 +00:00
Gabor Greif
c77d6781d5 fix obviously bogus (IMO) operand index of the load in asserts
(load only has one operand) and smuggle in some whitespace changes too

NB: I am obviously testing the water here, and believe that the unguarded
    cast is still wrong, but why is the getZExtValue of the load's operand
    tested against zero here? Any review is appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 08:58:49 +00:00
Craig Topper
420761a0f1 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 07:30:17 +00:00
Craig Topper
c909950c38 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 06:31:50 +00:00
Jakob Stoklund Olesen
eece9dc81c Revert r155136 "Defer some shl transforms to DAGCombine."
While the patch was perfect and defect free, it exposed a really nasty
bug in X86 SelectionDAG that caused an llc crash when compiling lencod.

I'll put the patch back in after fixing the SelectionDAG problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:38:45 +00:00
Jim Grosbach
181b147975 ARM some VFP tblgen'erated two-operand aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:15:00 +00:00
Jim Grosbach
bfb3c5a50c Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 00:14:57 +00:00
Jim Grosbach
2a22b691b6 ARM let TableGen handle a few two-operand aliases.
No need for these explicit aliases anymore. Nuke 'em.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:26 +00:00
Jim Grosbach
c1922c72ad TableGen support for auto-generating assembly two-operand aliases.
Assembly matchers for instructions with a two-operand form. ARM is full
of these, for example:
  add {Rd}, Rn, Rm  // Rd is optional and is the same as Rn if omitted.

The property TwoOperandAliasConstraint on the instruction definition controls
when, and if, an alias will be formed. No explicit InstAlias definitions
are required.

rdar://11255754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:23 +00:00
Bill Wendling
dc21604d4a Put this expensive check below the less expensive ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:31:07 +00:00
Bob Wilson
f2ae3467ce When cross compiling, install a host version of llvm-config. <rdar://11187889>
Now that llvm-config is a binary instead of a script the version installed
during a cross compiled build cannot be run from the host.  When cross
compiling, install a separate llvm-config-host that will run on the host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:19:55 +00:00
Dan Gohman
8b74e5afda Avoid a bug in the path count computation, preventing an infinite
loop repeatedlt making the same change. This is for rdar://11256239.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 21:50:46 +00:00
Joel Jones
c8969fd291 Test for the the problem with xors being changed into ands
when the set bits aren't the same for both args of the xor.
This transformation is in the function TargetLowering::SimplifyDemandedBits
in the file lib/CodeGen/SelectionDAG/TargetLowering.cpp.

I have tested this test using a previous version of llc which the defect and 
the a version of llc which does not. I got the expected fail and pass, 
respectively.

This test goes with rdar://11195364 and the check in with the fix: svn r154955


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 20:54:44 +00:00
Daniel Dunbar
adea497673 [docs] Update HTML pages to refer to CSS in a way that works locally and with Sphinx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 20:20:34 +00:00
Daniel Dunbar
3020c96440 [docs] Remove index.html, I am flipping the switch on llvm.org.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 20:06:39 +00:00
Michael J. Spencer
75338097c7 Remove llvm-ld and llvm-stub (which is only used by llvm-ld).
llvm-ld is no longer useful and causes confusion and so it is being removed.

* Does not work very well on Windows because it must call a gcc like driver to
  assemble and link.
* Has lots of hard coded paths which are wrong on many systems.
* Does not understand most of ld's options.
* Can be partially replaced by llvm-link | opt | {llc | as, llc -filetype=obj} |
  ld, or fully replaced by Clang.

I know of no production use of llvm-ld, and hacking use should be
replaced by Clang's driver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 19:27:54 +00:00
Jim Grosbach
b423d18a00 Use a SmallVector instead of std::vector for ResOperands.
There's almost always a small number of instruction operands, so
use a SmallVector and save on heap allocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 17:52:34 +00:00
Jim Grosbach
8caecdea56 Update some internal naming conventions to modern style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 17:52:32 +00:00
Jakob Stoklund Olesen
0d5fcae6cd Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:46:26 +00:00
Daniel Dunbar
057a4b40a6 [docs] Add back old index.html until I get llvm.org work done to support Sphinx docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:37:30 +00:00
Daniel Dunbar
21e993c1b1 [docs] Convert docs index page into Sphinx.
- Work in progress, this is mostly important because it lets us incrementally migrate the remaining documentation.
 - Lots of styling, editing, and integration work yet to come…
 - PR12589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:31:37 +00:00
Daniel Dunbar
75083ebc09 [docs] Stub out structure for Sphinx-based docs.
- Work in progress, this is just the basic structure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 16:31:19 +00:00