Commit Graph

136 Commits

Author SHA1 Message Date
Rafael Espindola
670655471d Assert on duplicate registration. Don't depend on function pointer equality.
Before this patch we would assert when building llvm as multiple shared
libraries (cmake's BUILD_SHARED_LIBS). The problem was the line

if (T.AsmStreamerCtorFn == Target::createDefaultAsmStreamer)

which returns false because of -fvisibility-inlines-hidden. It is easy
to fix just this one case, but I decided to try to also make the
registration more strict. It looks like the old logic for ignoring
followup registration was just a temporary hack that outlived its
usefulness.

This patch converts the ifs to asserts, fixes the few cases that were
registering twice and makes sure all the asserts compare with null.

Thanks for Joerg for reporting the problem and reviewing the patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192803 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 16:21:40 +00:00
Justin Holewinski
81d9902bb1 [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc
Fixes PR17529

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-11 12:39:39 +00:00
Justin Holewinski
43777c3150 Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs
For NVPTX, this fixes a crash where the emitImplicitDef implementation was expecting physical registers,
while NVPTX uses virtual registers (with a couple of exceptions).  Now, the implicit def comment will be
emitted as a true PTX register name. Other targets can use this to customize the output of implicit def
comments.

Fixes PR17519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-11 12:39:36 +00:00
Robert Wilhelm
f80a63fa23 Fix spelling intruction -> instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-28 11:46:15 +00:00
Tim Northover
3e84ad28d4 ISelDAG: spot chain cycles involving MachineNodes
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.

Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.

This should fix PR15840.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191165 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-22 08:21:56 +00:00
Justin Holewinski
3917535b1a [NVPTX] Support constant vector globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-19 12:51:46 +00:00
Justin Holewinski
30632d2fbb [NVPTX] Re-enable assembly printing support for inline assembly
This support was removed by accident during the MC conversion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189160 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-24 01:17:23 +00:00
Dmitri Gribenko
1edd1a336a Remove unused stdio.h includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 08:29:51 +00:00
Craig Topper
0ff1190888 Replace getValueType().getSimpleVT() with getSimpleValueType().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 02:44:19 +00:00
Justin Holewinski
06d63b31be [NVPTX] We dont have any target specific flags yet for generating symbol references, so get rid of the default-only switch statement. Fixes an MSVC warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 23:06:42 +00:00
Justin Holewinski
df66ff09bc [NVPTX] Add missing patterns for i1 [s,u]int_to_fp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:34 +00:00
Justin Holewinski
a3635eefc7 [NVPTX] Fix bug in stack code generation causes by MC conversion
We do use a very small set of physical registers, so account for
them in the virtual register encoding between MachineInstr and MC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187799 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:31 +00:00
Justin Holewinski
82767327c5 [NVPTX] Start conversion to MC infrastructure
This change converts the NVPTX target to use the MC infrastructure
instead of directly emitting MachineInstr instances. This brings
the target more up-to-date with LLVM TOT, and should fix PR15175
and PR15958 (libNVPTXInstPrinter is empty) as a side-effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187798 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 14:13:27 +00:00
NAKAMURA Takumi
8e1d64666f Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.
Without explicit dependencies, both per-file action and in-CommonTableGen action could run in parallel.
It races to emit *.inc files simultaneously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 06:38:37 +00:00
Justin Holewinski
6303ef1fb7 [NVPTX] Remove unused prototypes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186844 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 17:04:40 +00:00
Justin Holewinski
3a8ee4ffd7 [NVPTX] Use approximate FP ops when unsafe-fp-math is used, and append
.ftz to instructions if the nvptx-f32ftz attribute is set to "true"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 12:18:04 +00:00
Tim Northover
2f438131f1 ARM: implement ldrex, strex and clrex intrinsics
Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-16 09:46:55 +00:00
Craig Topper
a0ec3f9b7b Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 04:42:23 +00:00
Craig Topper
6227d5c690 Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-04 01:31:24 +00:00
Justin Holewinski
728af3d574 [NVPTX] Add support for module-scope inline asm
Since we were explicitly not calling AsmPrinter::doInitialization,
any module-scope inline asm was not being printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 13:00:14 +00:00
Justin Holewinski
1fd09172bb [NVPTX] We dont use NVBuiltin anymore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185335 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:59:08 +00:00
Justin Holewinski
c676590614 [NVPTX] Cut down on physical register defs
We are using virtual registers throughout now, but we still need
to keep a few physical registers per class around to keep the
infrastructure happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:59:06 +00:00
Justin Holewinski
fc32eb472a [NVPTX] 64-bit ADDC/ADDE are not legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185333 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:59:04 +00:00
Justin Holewinski
be08c60533 [NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185332 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:59:01 +00:00
Justin Holewinski
03e5bb2c87 [NVPTX] Handle signext/zeroext attributes properly
Fix a case where we were incorrectly sign-extending a value when we should have been zero-extending the value.

Also change some SIGN_EXTEND to ANY_EXTEND because we really dont care and may have more opportunity to fold subexpressions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:58 +00:00
Justin Holewinski
8834184a46 [NVPTX] Add support for native SIGN_EXTEND_INREG where available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:56 +00:00
Justin Holewinski
9bc8feeb4f [NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:52 +00:00
Justin Holewinski
30b13ebd0b [NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:48 +00:00
Benjamin Kramer
bebf6222f6 NVPTX: Fold otherwise unused variable into assert.
Avoids unused variable warnings in release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-29 22:51:12 +00:00
Justin Holewinski
b206498b95 [NVPTX] Select -1 instead of 1 when anyextend'ing i1 types
This makes it more consistent with the ZeroOrNegativeOneBooleanContent flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:15 +00:00
Justin Holewinski
f51a22e815 [NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:13 +00:00
Justin Holewinski
ac78a0645d [NVPTX] Calling conventions fix
Fix ABI handling for function
returning bool -- use st.param.b32 to return the value
and use ld.param.b32 in caller to load the return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:10 +00:00
Justin Holewinski
331ba2739d [NVPTX] Add support for cttz/ctlz/ctpop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:07 +00:00
Justin Holewinski
ef0ccc9320 [NVPTX] Clean up comparison/select/convert patterns and factor out PTX instructions from their patterns
Test case is no breakage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:04 +00:00
Justin Holewinski
1c07dae9fc [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:57:59 +00:00
Justin Holewinski
bc48ce87ef [NVPTX] Add support for vectorized function return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185173 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:57:55 +00:00
Justin Holewinski
b673665143 [NVPTX] Clean up handling of formal arguments and enable generation of vector parameter loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185172 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:57:53 +00:00
Justin Holewinski
00df125228 [NVPTX] Add infrastructure for vector loads/stores of parameters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185171 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:57:51 +00:00
Manman Ren
cbafae6d33 Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify. For cases where we know the type of a DI metadata, use
assert.

Also update testing cases to make them conform to the format of DI classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185135 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 05:43:10 +00:00
Eric Christopher
8479989ebe Revert "Debug Info: clean up usage of Verify." as it's breaking bots.
This reverts commit r185020

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:44:57 +00:00
Manman Ren
02e75021d8 Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 21:26:10 +00:00
Justin Holewinski
5df8c1bbb6 [NVPTX] Default pointer type doesn't make sense for getParamSymbol()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 12:22:21 +00:00
NAKAMURA Takumi
f1505ff35b NVPTXTargetObjectFile.h: Initialize some pointers as NULL in the constructor of NVPTXTargetObjectFile. ~NVPTXTargetObjectFile() tries to delete them.
It caused crash on some hosts since r184595.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184728 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 13:19:41 +00:00
Chad Rosier
5b3fca50a0 The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-22 18:37:38 +00:00
Justin Holewinski
0ff4287fe2 [NVPTX] Add support for selecting CUDA vs OCL mode based on triple
IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 18:51:49 +00:00
Bill Wendling
0c92f2a1c7 Don't pass in the TargetInstrInfo into the register info object. It doesn't use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-19 21:59:00 +00:00
Justin Holewinski
7c32502a7f [NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183652 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 13:29:47 +00:00
Benjamin Kramer
488401e9c9 NVPTX: Don't even create a regalloc if we're not going to use it.
Fixes a leak found by valgrind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 19:21:58 +00:00
Justin Holewinski
5443e7d790 [NVPTX] Re-enable support for virtual registers in the final output
Now that 3.3 is branched, we are re-enabling virtual registers to help
iron out bugs before the next release. Some of the post-RA passes do
not play well with virtual registers, so we disable them for now. The
needed functionality of the PrologEpilogInserter pass is copied to a
new backend-specific NVPTXPrologEpilog pass.

The test for this commit is not breaking the existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 12:14:49 +00:00
Justin Holewinski
d5c52f1d76 [NVPTX] Fix case where a sext load of an i1 type may produce an
ld.u1 instead of an ld.u8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 12:22:39 +00:00