Commit Graph

105184 Commits

Author SHA1 Message Date
Justin Holewinski
cb8f98382b [NVPTX] Fix handling of ldg/ldu intrinsics.
The address space of the pointer must be global (1) for these intrinsics.  There must also be alignment metadata attached to the intrinsic calls, e.g.

%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0

!0 = metadata !{i32 4}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:51 +00:00
Justin Holewinski
8992274412 [NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:44 +00:00
Justin Holewinski
3fb44103eb [NVPTX] Add missing boolean vector contents flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211937 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:42 +00:00
Justin Holewinski
863b0d45a5 [NVPTX] Add support for [SHL,SRA,SRL]_PARTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211936 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:40 +00:00
Justin Holewinski
10da1651ed [NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:37 +00:00
Justin Holewinski
508c80f11f [NVPTX] Add support for efficient rotate instructions on SM 3.2+
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:33 +00:00
Justin Holewinski
1f75f4a0ee [NVPTX] Add missing isel patterns for 64-bit atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:30 +00:00
Justin Holewinski
ef92cf50d6 [NVPTX] Add isel patterns for bit-field extract (bfe)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211932 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:27 +00:00
Justin Holewinski
de7bbdff33 [NVPTX] Add support for isspacep instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211931 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:24 +00:00
Justin Holewinski
1571d272c8 [NVPTX] Add support for envreg reads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:21 +00:00
Justin Holewinski
305dda4fc7 [NVPTX] Add target options for PTX 3.2/4.0 and SM 5.0 (Maxwell)
Default PTX version is set to PTX 3.2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211929 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:18 +00:00
Justin Holewinski
aac29c0c22 [NVPTX] Update sub-target feature detection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211928 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:16 +00:00
Justin Holewinski
7d7f3e3923 [NVPTX] Directly control the Machine SSA passes that are invoked for NVPTX.
NVPTX is a bit special in the optimizations it requires, so this gives
us better control over the backend optimization pipeline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211927 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:14 +00:00
Justin Holewinski
a54609ed93 [NVPTX] Emit .weak when linkage is not external, internal, or private
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:10 +00:00
Justin Holewinski
d51ee46dc5 [NVPTX] Just use getTypeAllocSize() when computing return value size for structures and vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211925 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:08 +00:00
Tyler Nowicki
9487d2ad4c Vectorization documentation for loop hint pragmas and Rpass diagnostics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:30:08 +00:00
Aaron Ballman
f983ac349b Silencing some -Wcast-qual warnings. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:25:49 +00:00
Chandler Carruth
75504d45ec [x86] Fix a miscompile in the new shuffle lowering uncovered by
a bootstrap.

I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:25:23 +00:00
David Majnemer
c8a1169c93 IR: Add COMDATs to the IR
This new IR facility allows us to represent the object-file semantic of
a COMDAT group.

COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.

This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.

Differential Revision: http://reviews.llvm.org/D4178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:19:56 +00:00
Reid Kleckner
4a295dfbf9 cmake: Don't do anything for LLVM_ENABLE_ASSERTIONS=OFF
By default, CMake will set NDEBUG in Rel* builds and leave it off in
debug builds, so we shouldn't need to do anything ourselves.

Before this change, it was possible to a Debug build without assertions
(aka Debug-Asserts in the autoconf system) by configuring with
-DLLVM_ENABLE_ASSERTIONS=OFF, but this configuration isn't very useful.
You can still get the same effect by explicitly adding -DNDEBUG to
CFLAGS.

Differential Revision: http://reviews.llvm.org/D4257

Patch by Janusz Sobczak!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211919 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:17:30 +00:00
Julien Lerouge
86ebb340ef lldb can interrupt waitpid, so EINTR shouldn't be an error. This fixes the case
where there is no timeout. In the case where there is a timeout though, the
code is still wrong since it doesn't check that the alarm really went off.

Without this patch, I cannot debug a program that forks itself using
sys::ExecuteAndWait with lldb.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:02:54 +00:00
Matt Arsenault
896cde882f R600: Move trivial getters into header, use initializer list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:57:00 +00:00
David Blaikie
e70cdf9468 Fix test so it doesn't try to write out temporary files into the test tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:45:43 +00:00
Logan Chien
7b45088df0 Avoid non-ascii character in the source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211914 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:25:54 +00:00
David Majnemer
d7d427732e MC: Fix associative sections on COFF
COFF sections in MC were represented by a tuple of section-name and
COMDAT-name.  This is not sufficient to represent a .text section
associated with another .text section; we need a way to distinguish
between the key section and the one marked associative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211913 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:19:44 +00:00
Juergen Ributzka
6d557f37cf [FastISel][X86] Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:16:34 +00:00
Matt Arsenault
ee5d4a7b73 R600: Don't crash on unhandled instruction in promote alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 16:52:49 +00:00
Ed Maste
b880c129ec llvm-objdump: don't assert if ELF file has no sections
FreeBSD core files, for example, have no sections (only program headers).

llvm.org/pr20139
Differential Revision: http://reviews.llvm.org/D4323


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211904 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 16:37:20 +00:00
Alexander Kornienko
cea9bc981a Clean up unused variable warning in release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 15:30:55 +00:00
Chandler Carruth
39ea80cc56 Re-apply r211287: Remove support for LLVM runtime multi-threading.
I'll fix the problems in libclang and other projects in ways that don't
require <mutex> until we sort out the cygwin situation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 15:13:01 +00:00
Ulrich Weigand
1edaab996f [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:

        ld 0, 20936(1)                  # 8-byte Folded Reload
        stw 12, 10348(0)
        stw 12, 10344(0)

The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass.  That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.

That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 13:04:12 +00:00
Chandler Carruth
88897b7c05 [x86] Clean up some unused variables, especially in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211894 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 12:04:18 +00:00
Chandler Carruth
c5114dbcc3 [x86] Teach the target combine step to aggressively fold pshufd insturcions.
Summary:
This allows it to fold pshufd instructions across intervening
half-shuffles and other noise. This pattern actually shows up in the
generic lowering tests, but I've also added direct tests using
intrinsics to make sure that the specific desired functionality is
working even if the lowering stuff changes in the future.

Differential Revision: http://reviews.llvm.org/D4292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:40:13 +00:00
Simon Atanasyan
fc9897f66f [ELF][Mips] Fix recognition of MIPS 64-bit arch in the ELFObjectFile:getArch() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:36:45 +00:00
Chandler Carruth
4363b0729b [x86] Teach the target-specific combining how to aggressively fold
half-shuffles, even looking through intervening instructions in a chain.

Summary:
This doesn't happen to show up with any test cases I've found for the current
shuffle lowering, but previous attempts would benefit from this and it seems
generally useful. I've tested it directly using intrinsics, which also shows
that it will work with hand vectorized code as well.

Note that even though pshufd isn't directly used in these tests, it gets
exercised because we combine some of the half shuffles into a pshufd
first, and then merge them.

Differential Revision: http://reviews.llvm.org/D4291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:34:40 +00:00
Chandler Carruth
f91161874e [x86] Teach the X86 backend to DAG-combine SSE2 shuffles that are
trivially redundant.

This fixes several cases in the new vector shuffle lowering algorithm
which would generate redundant shuffle instructions for the sake of
simplicity.

I'm also deleting a testcase which was somewhat ridiculous. It was
checking for a bug in 2007 about incorrectly transforming shuffles by
looking for the string "-86" in the output of a pretty substantial
function. This test case doesn't seem to have any value at this point.

Differential Revision: http://reviews.llvm.org/D4240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:27:52 +00:00
Chandler Carruth
050d187bc8 [x86] Begin a significant overhaul of how vector lowering is done in the
x86 backend.

This sketches out a new code path for vector lowering, hidden behind an
off-by-default flag while it is under development. The fundamental idea
behind the new code path is to aggressively break down the problem space
in ways that ease selecting the odd set of instructions available on
x86, and carefully avoid scalarizing code even when forced to use older
ISAs. Notably, this starts off restricting itself to SSE2 and implements
the complete vector shuffle and blend space for 128-bit vectors in SSE2
without scalarizing. The plan is to layer on top of this ISA extensions
where we can bail out of the complex SSE2 lowering and opt for
a cheaper, specialized instruction (or set of instructions). It also
needs to be generalized to AVX and AVX512 vector widths.

Currently, this does a decent but not perfect job for SSE2. There are
some specific shortcomings that I plan to address:
- We need a peephole combine to fold together shuffles where possible.
  There are cases where a previous shuffle could be modified slightly to
  arrange for elements to be in the correct position and a later shuffle
  eliminated. Doing this eagerly added quite a bit of complexity, and
  so my plan is to combine away these redundancies afterward.
- There are a lot more clever ways to use unpck and pack that need to be
  added. This is essential for real world shuffles as it turns out...

Once SSE2 is polished a bit I should be able to get interesting numbers
on performance improvements on benchmarks conducive to vectorization.
All of this will be off by default until it is functionally equivalent
of course.

Differential Revision: http://reviews.llvm.org/D4225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:23:44 +00:00
Ulrich Weigand
3e19a9ee9f [RuntimeDyld, PowerPC] Fix/improve handling of TOC relocations
Current PPC64 RuntimeDyld code to handle TOC relocations has two
problems:

- With recent linkers, in addition to the relocations that implicitly
  refer to the TOC base (R_PPC64_TOC*), you can now also use the .TOC.
  magic symbol with any other relocation to refer to the TOC base
  explicitly.  This isn't currently used much in ELFv1 code (although
  it could be), but it is essential in ELFv2 code.

- In a complex JIT environment with multiple modules, each module may
  have its own .toc section, and TOC relocations in one module must
  refer to *its own* TOC section.  The current findPPC64TOC implementation
  does not correctly implement this; in fact, it will always return the
  address of the first TOC section it finds anywhere.  (Note that at the
  time findPPC64TOC is called, we don't even *know* which module the
  relocation originally resided in, so it is not even possible to fix
  this routine as-is.)

This commit fixes both problems by handling TOC relocations earlier, in
processRelocationRef.  To do this, I've removed the findPPC64TOC routine
and replaced it by a new routine findPPC64TOCSection, which works
analogously to findOPDEntrySection in scanning the sections of the
ObjImage provided by its caller, processRelocationRef.  This solves the
issue of finding the correct TOC section associated with the current
module.

This makes it straightforward to implement both R_PPC64_TOC relocations,
and relocations explicitly refering to the .TOC. symbol, directly in
processRelocationRef.  There is now a new problem in implementing the
R_PPC64_TOC16* relocations, because those can now in theory involve
*three* different sections: the relocation may be applied in section A,
refer explicitly to a symbol in section B, and refer implicitly to the
TOC section C.  The final processing of the relocation thus may only
happen after all three of these sections have been assigned final
addresses.  There is currently no obvious means to implement this in
its general form with the common-code RuntimeDyld infrastructure.

Fortunately, ppc64 code usually makes no use of this most general form;
in fact, TOC16 relocations are only ever generated by LLVM for symbols
residing themselves in the TOC, which means "section B" == "section C"
in the above terminology.  This special case can easily be handled with
the current infrastructure, and that is what this patch does.
[ Unhandled cases result in an explicit error, unlike the current code
which silently returns the wrong TOC base address ... ]

This patch makes the JIT work on both BE and LE (ELFv2 requires
additional patches, of course), and allowed me to successfully run
complex JIT scenarios (via mesa/llvmpipe).

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 10:32:14 +00:00
Alp Toker
9b0be7b61a IRReader: don't mark MemoryBuffers const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 09:19:14 +00:00
Dinesh Dwivedi
22e371c74e Added instruction combine to transform few more negative values addition to subtraction (Part 3)
This patch enables transforms for

(x + (~(y | c) + 1) --> x - (y | c) if c is odd

Differential Revision: http://reviews.llvm.org/D4210



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211881 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:47:35 +00:00
Eric Christopher
4299a8b4ba Remove the caching of the target machine from SystemZTargetLowering.
Update all callers and uses accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211880 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:38:01 +00:00
David Majnemer
d023a353c1 GlobalOpt: Fix constantfold-initializers.ll test
The test added in r211762 was sloppy, the correct initializer wasn't
added to @llvm.global_ctors

Spotted by Pasi Parviainen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211879 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:36:26 +00:00
Eric Christopher
c6bf2379c1 Remove target machine caching from SystemZInstrInfo and
SystemZRegisterInfo and replace it with the subtarget as that's
all they needed in the first place. Update all uses and calls
accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:01:17 +00:00
David Blaikie
0263debd04 Revert "Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location."""
Reverting this again, didn't mean to commit it - while r211872 fixes one
of the issues here, there are still others to figure out and address.

This reverts commit r211871.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211873 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:34:05 +00:00
David Blaikie
effea626e2 ArgumentPromotion: Propagate debug locations on calls for which arguments are promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:32:09 +00:00
David Blaikie
150f5b8920 Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location.""
This reverts commit r211724.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:31:49 +00:00
Eric Christopher
a4e84da0b4 Have SystemZSelectionDAGInfo constructor take a DataLayout rather
than a target machine since it doesn't need anything past the
DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211870 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:26:28 +00:00
Craig Topper
ba39a59cd0 Rename getX86ConditonCode -> getX86ConditionCode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211869 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:18:21 +00:00
Andrew Trick
ac5b1ec8c4 Left out the NDEBUG in the previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:09:36 +00:00
Andrew Trick
e8f8db1c5a MachineScheduler: add some book-keeping to fix an assert.
Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"'

Thanks to Chad for the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211865 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 04:57:05 +00:00