Commit Graph

17965 Commits

Author SHA1 Message Date
Devang Patel
cbdfb8a9d5 DominanceFrontier::calculate().
Avoid recursion, Use iterative algorithm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35225 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:25:31 +00:00
Jeff Cohen
c01a53007a Fix some VC++ warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:43:18 +00:00
Jeff Cohen
09dfd8e19d Fix (and simplify) 48-bit byte swap.
Get pos/neg infinity the correct way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35223 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:42:36 +00:00
Devang Patel
3b57b6f36e LoopSimplify::FindPHIToPartitionLoops()
Use ETForest instead of DominatorSet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35221 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:18:12 +00:00
Lauro Ramos Venancio
a0a26b7454 Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:09:03 +00:00
Evan Cheng
29a68fb5b7 Minor bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35219 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio
64c88d741e bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:57:23 +00:00
Reid Spencer
9eba7a2cb5 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35215 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:19:31 +00:00
Reid Spencer
810cce8434 Don't delete things before their last use (avoids bad reads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35214 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:18:33 +00:00
Lauro Ramos Venancio
8334b9fa3b CopyToReg source operand can be a physical register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 16:46:44 +00:00
Zhou Sheng
2cde46cb66 Simplify isHighOnes().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35211 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 12:49:06 +00:00
Evan Cheng
2638e1a6b9 First cut trivial re-materialization support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35208 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:13:50 +00:00
Evan Cheng
c70d1849b7 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e New entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:09:38 +00:00
Chris Lattner
a16b7cb1d3 Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0 fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 02:25:53 +00:00
Reid Spencer
66728ef3d2 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35199 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 01:13:36 +00:00
Reid Spencer
2c9df214c7 Plug some PATypeHolder memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35198 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 01:13:00 +00:00
Dale Johannesen
dc42f48ea9 use types of loads and stores, not address, in CheckForIVReuse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35197 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:47:50 +00:00
Dale Johannesen
80dae195c7 fix obvious comment bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:30:56 +00:00
Chris Lattner
91857da2f5 Fix a nasty memory leak, caused by my revamp of the value symbol table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35195 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:18:10 +00:00
Reid Spencer
5f6a89562d Make isOneBitSet faster by using APInt::isPowerOf2. Thanks Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:16:52 +00:00
Reid Spencer
05227d88af APIntify the isHighOnes utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35190 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:29:50 +00:00
Reid Spencer
adf2a206ec Fix coding standards violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:19:02 +00:00
Reid Spencer
3a2a9fbf99 Implement isMaxValueMinusOne in terms of APInt instead of uint64_t.
Patch by Sheng Zhou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35188 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:10:28 +00:00
Reid Spencer
727992c30a Implement isMinValuePlusOne using facilities of APInt instead of uint64_t
Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35187 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:08:07 +00:00
Reid Spencer
44e33e674a Implement isOneBitSet in terms of APInt::countPopulation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35186 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:04:43 +00:00
Reid Spencer
5a1e3e1a7d 1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou)
2. Replace uses of the "isPositive" utility function with APInt::isPositive


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35185 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:58:18 +00:00
Reid Spencer
8439bc8d69 Remove a redundant clause in an if statement.
Patch by Sheng Zhou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35184 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:47:50 +00:00
Reid Spencer
49d273e168 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35183 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:51 +00:00
Reid Spencer
eac65746d7 Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"
parameter on ConstantInt::get to indicate the signedness of the intended
value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:22 +00:00
Reid Spencer
7fc44c8c5f Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a
negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35181 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:39:08 +00:00
Reid Spencer
3a34137548 Implement extension of sign bits for negative values in the uint64_t
constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35180 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:37:47 +00:00
Anton Korobeynikov
d437db1b7b Fix mingw32 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:19:08 +00:00
Reid Spencer
93c40036c8 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35174 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:40:50 +00:00
Reid Spencer
186a43f1ad For PR1248:
Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:39:36 +00:00
Reid Spencer
4e0422c7e6 Add and Operator== method to ValID so equality can be done properly for
named or numbered ValIDs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:34:28 +00:00
Reid Spencer
590b3c559f For PR1258:
Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35171 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:32:53 +00:00
Chris Lattner
a9d1a843fc fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35169 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:57 +00:00
Evan Cheng
757072d954 Remove -reduce-joining-phys-regs options. Make it on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6 Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417 Constant generation instructions are re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f Added isReMaterializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Evan Cheng
79b098445b Minor bug fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Chris Lattner
d435dbcbf9 fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
8bf9911932 implement the next chunk of SROA with memset/memcpy's of aggregates. This
implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:16:43 +00:00
Nick Lewycky
3f64b1ab1d Clean up this code and fix subtract miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:58:46 +00:00
Chris Lattner
318bf7963a Implement InstCombine/and-xor-merge.ll:test[12].
Rearrange some code to simplify it now that shifts are binops


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:51:34 +00:00