Commit Graph

112410 Commits

Author SHA1 Message Date
Philip Reames
cce3c83917 Refine memory dependence's notion of volatile semantics
According to my reading of the LangRef, volatiles are only ordered with respect to other volatiles. It is entirely legal and profitable to forward unrelated loads over the volatile load. This patch implements this for GVN by refining the transition rules MemoryDependenceAnalysis uses when encountering a volatile.

The added test cases show where the extra flexibility is profitable for local dependence optimizations. I have a related change (227110) which will extend this to non-local dependence (i.e. PRE), but that's essentially orthogonal to the semantic change in this patch. I have tested the two together and can confirm that PRE works over a volatile load with both changes.  I will be submitting a PRE w/volatiles test case seperately in the near future.

Differential Revision: http://reviews.llvm.org/D6901



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:54:27 +00:00
Sanjay Patel
956d6f0cf5 Model sqrtsd as a binary operation with one source operand tied to the destination (PR14221)
This patch fixes the following miscompile:

define void @sqrtsd(<2 x double> %a) nounwind uwtable ssp {
  %0 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a) nounwind 
  %a0 = extractelement <2 x double> %0, i32 0
  %conv = fptrunc double %a0 to float
  %a1 = extractelement <2 x double> %0, i32 1
  %conv3 = fptrunc double %a1 to float
  tail call void @callee2(float %conv, float %conv3) nounwind
  ret void
}

Current codegen:

sqrtsd	%xmm0, %xmm1        ## high element of %xmm1 is undef here
xorps	%xmm0, %xmm0
cvtsd2ss	%xmm1, %xmm0
shufpd	$1, %xmm1, %xmm1
cvtsd2ss	%xmm1, %xmm1 ## operating on undef value
jmp	_callee

This is a continuation of http://llvm.org/viewvc/llvm-project?view=revision&revision=224624 ( http://reviews.llvm.org/D6330 ) 
which was itself a continuation of r167064 ( http://llvm.org/viewvc/llvm-project?view=revision&revision=167064 ).

All of these patches are partial fixes for PR14221 ( http://llvm.org/bugs/show_bug.cgi?id=14221 ); 
this should be the final patch needed to resolve that bug.

Differential Revision: http://reviews.llvm.org/D6885



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227111 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:42:16 +00:00
Philip Reames
8a5ad05c13 Pass QueryInst down through non-local dependency calculation
This change is mostly motivated by exposing information about the original query instruction to the actual scanning work in getPointerDependencyFrom when used by GVN PRE. In a follow up change, I will use this to be more precise with regards to the semantics of volatile instructions encountered in the scan of a basic block.

Worth noting, is that this change (despite appearing quite simple) is not semantically preserving. By providing more information to the helper routine, we allow some optimizations to kick in that weren't previously able to (when called from this code path.) In particular, we see that treatment of !invariant.load becomes more precise. In theory, we might see a difference with an ordered/atomic instruction as well, but I'm having a hard time actually finding a test case which shows that.

Test wise, I've included new tests for !invariant.load which illustrate this difference. I've also included some updated TBAA tests which highlight that this change isn't needed for that optimization to kick in - it's handled inside alias analysis itself. 

Eventually, it would be nice to factor the !invariant.load handling inside alias analysis as well.

Differential Revision: http://reviews.llvm.org/D6895



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227110 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:39:52 +00:00
Philip Reames
2bdb23849b Revert GCStrategy ownership changes
This change reverts the interesting parts of 226311 (and 227046).  This change introduced two problems, and I've been convinced that an alternate approach is preferrable anyways.

The bugs were:
- Registery appears to require all users be within the same linkage unit.  After this change, asking for "statepoint-example" in Transform/ would sometimes get you nullptr, whereas asking the same question in CodeGen would return the right GCStrategy.  The correct long term fix is to get rid of the utter hack which is Registry, but I don't have time for that right now.  227046 appears to have been an attempt to fix this, but I don't believe it does so completely.
- GCMetadataPrinter::finishAssembly was being called more than once per GCStrategy.  Each Strategy was being added to the GCModuleInfo multiple times.

Once I get time again, I'm going to split GCModuleInfo into the gc.root specific part and a GCStrategy owning Analysis pass.  I'm probably also going to kill off the Registry.  Once that's done, I'll move the new GCStrategyAnalysis and all built in GCStrategies into Analysis.  (As original suggested by Chandler.)  This will accomplish my original goal of being able to access GCStrategy from Transform/  without adding all of the builtin GCs to IR/.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227109 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:26:35 +00:00
Zachary Turner
019c097d1b Teach raw_ostream to support hex formatting without a prefix '0x'.
Previously using format_hex() would always print a 0x prior to the
hex characters.  This allows this to be optional, so that one can
choose to print (e.g.) 255 as either 0xFF or just FF.

Differential Revision: http://reviews.llvm.org/D7151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:21:33 +00:00
Alex Rosenberg
583a153662 Remove trailing whitespace. NFC ®
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:02:18 +00:00
Alex Rosenberg
1cc4d3de39 Remove trailing whitespace.
Also test commit email processing by including this char: '®'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227103 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:35:56 +00:00
Eric Christopher
fcd3c4065d Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of disparate classes with no hierarchy,
and b) there's no overarching equivalent to the TargetMachine, instead
only the subtarget via MCSubtargetInfo (which is the base class of
TargetSubtargetInfo).

We're now storing the ABI in both the TargetMachine level and in the
MC level because the AsmParser and the TargetStreamer both need to
know what ABI we have to parse assembly and emit objects. The target
streamer has a pointer to the one in the asm parser and is updated
when the asm parser is created. This is fragile as the FIXME comment
notes, but shouldn't be a problem in practice since we always
create an asm parser before attempting to emit object code via the
assembler. The TargetMachine now contains the ABI so that the DataLayout
can be constructed dependent upon ABI.

All testcases have been updated to use the -target-abi command line
flag so that we can set the ABI without using a subtarget feature.

Should be no change visible externally here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
Eric Christopher
5da54492f1 Store the passed in CPU name string so that it can be accessed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227101 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:30 +00:00
Daniel Berlin
8e43882572 Fix incorrect partial aliasing
Update testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:31:17 +00:00
Daniel Berlin
0d16cafbe3 Fix delegation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:30:39 +00:00
Sanjay Patel
dbc6dda771 fix line-endings; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227095 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:21:36 +00:00
Michael J. Spencer
58fed4d65a [Support][Windows] Disable error dialog boxes when stack trace printing is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227094 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:05:02 +00:00
Chris Bieneman
e0c2d280a2 Putting all the standard tool options into a "Generic" category.
Summary:
This puts all the options that CommandLine.cpp implements into a category so that the APIs to hide options can not hide based on the generic category instead of string matching a partial list of argument strings.

This patch is pretty simple and straight forward but it does impact the -help output of all tools using cl::opt. Specifically the options implemented in CommandLine.cpp (help, help-list, help-hidden, help-list-hidden, print-options, print-all-options, version) are all grouped together into an Option category, and these options are never hidden by the cl::HideUnrelatedOptions API.

Reviewers: dexonsmith, chandlerc, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227093 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 16:56:00 +00:00
Alex Rosenberg
1e0dc31134 [MC] The PS4's ELF OSABI value is the same as FreeBSD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227091 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 15:42:07 +00:00
Alex Rosenberg
83a0a62a52 Teach the autoconf machinery about the PS4 triple.
(I think the last checkin, r227060, got lost from the mailing lists because of the (R) in the comment.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227090 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 15:25:05 +00:00
Vasileios Kalintiris
536bce219d [mips] Enable arithmetic and binary operations for the i128 data type.
Summary:
This patch adds support for some operations that were missing from
128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these
changes we can support the __int128_t and __uint128_t data types
from C/C++.

Depends on D7125

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227089 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 12:33:22 +00:00
Vasileios Kalintiris
71ec66e7fd [mips] Add tests for bitwise binary and integer arithmetic operators.
Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227087 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 12:04:40 +00:00
Joerg Sonnenberger
d546b25ddb The canonical CPU variant for ARM according to config.guess uses a
suffix it seems:

    # ./config.guess
    earmv7hfeb-unknown-netbsd7.99.4

Extend the triple parsing to support this. Avoid running the ARM parser
multiple times because StringSwitch is not lazy.

Reviewers: Renato Golin, Tim Northover

Differential Revision: http://reviews.llvm.org/D7166


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227085 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 11:41:48 +00:00
Vladimir Medic
c211591e17 When disassembler meets compact jump instructions for r6 it crashes as the access to operands array is out of range. This patch removes dedicated decoder method that wrongly handles decoding of these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227084 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 10:33:43 +00:00
Vasileios Kalintiris
823e8548a0 Revert "[mips] Fix assertion on i128 addition/subtraction on MIPS64"
This reverts commit r227003. Support for addition/subtraction and
various other operations for the i128 data type will be added in a
future commit based on the review D7143.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227082 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 09:53:30 +00:00
NAKAMURA Takumi
77453e91c9 Revert llvm/test/MC/ELF/noexec.s in r227074, "Fix a problem where the AArch64 ELF assembler was failing with"
It should be split into target-specific location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227080 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 09:30:29 +00:00
Erik Eckstein
8f6e8cb4f6 SLPVectorizer: fix wrong scheduling of atomic load/stores.
This fixes PR22306.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227077 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 09:07:04 +00:00
Eric Christopher
56471c4aec Correct the header guard for MipsABIInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 08:19:53 +00:00
Eric Christopher
acbaac49dc Fix a problem where the AArch64 ELF assembler was failing with
-no-exec-stack. This was due to it not deriving from the correct
asm info base class and missing the override for the exec
stack section query. Added another line to the noexec test
line to make sure this doesn't regress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227074 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 06:32:17 +00:00
Craig Topper
1656cc8ddb [X86] Change comparision immediate type to i8 in test cases for AVX512 floating point comparisons. The type was already changed in the definitions and was being auto upgraded to the new type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 23:26:12 +00:00
Craig Topper
fd176682b9 [X86] Use i8 immediate for comparison type on AVX512 packed integer instructions. This matches floating point equivalents. Includes autoupgrade support to convert old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227063 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 23:26:02 +00:00
Alex Rosenberg
f6c7255d5f Add the triple for the Sony Playstation®4.
Lots more to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227060 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 22:46:59 +00:00
Adrian Prantl
10543e8587 Debug info: Fix PR22296 by omitting the DW_AT_location if we lost the
physical register that is described in a DBG_VALUE.

In the testcase the DBG_VALUE describing "p5" becomes unavailable
because the register its address is in is clobbered and we (currently)
aren't smart enough to realize that the value is rematerialized immediately
after the DBG_VALUE and/or is actually a stack slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 19:04:08 +00:00
Bill Schmidt
9dbb6a4f63 [PowerPC] Revert ppc64le-aggregates.ll test changes from r227053
It appears we have different behavior with and without -mcpu=pwr8 even
with ppc64le defaulting to POWER8.  The failure appears as follows:

/home/bb/cmake-llvm-x86_64-linux/llvm-project/llvm/test/CodeGen/PowerPC/ppc64le-aggregates.ll:268:14: error: expected string not found in input
; CHECK-DAG: lfs 1, 0([[REG]])
             ^
<stdin>:497:11: note: scanning from here
 ld 3, .LC1@toc@l(3)
          ^
<stdin>:497:11: note: with variable "REG" equal to "3"
 ld 3, .LC1@toc@l(3)
          ^
<stdin>:514:2: note: possible intended match here
 lfs 1, 0(4)
 ^

Reverting this particular test case change.  Nemanja, please have a look
at the reason for the failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227055 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 18:18:54 +00:00
Bill Schmidt
c536eed4d8 [PowerPC] Reset the baseline for ppc64le to be equivalent to pwr8
Test by Nemanja Ivanovic.

Since ppc64le implies POWER8 as a minimum, it makes sense that the
same features are included. Since the pwr8 processor model will likely
be getting new features until the implementation is complete, I
created a new list to add these updates to. This will include them in
both pwr8 and ppc64le.

Furthermore, it seems that it would make sense to compose the feature
lists for other processor models (pwr3 and up). Per discussion in the
review, I will make this change in a subsequent patch.

In order to test the changes, I've added an additional run step to
test cases that specify -march=ppc64le -mcpu=pwr8 to omit the -mcpu
option. Since the feature lists are the same, the behaviour should be
unchanged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 18:05:42 +00:00
Simon Atanasyan
1029e9ca38 [docs] Add link to the MIPS 64-bit ELF object file specification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227050 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 16:20:30 +00:00
NAKAMURA Takumi
5bccc06f8d Instantiate Registry<GCStrategy> in LLVMCore, to let it available on Win32 DLL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 15:05:36 +00:00
Simon Atanasyan
09a46075ee [ELFYAML] Support mips64 relocation record format in yaml2obj/obj2yaml
MIPS64 ELF file has a very specific relocation record format. Each
record might specify up to three relocation operations. So the `r_info`
field in fact consists of three relocation type sub-fields and optional
code of "special" symbols.

http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf
page 40

The patch implements support of the MIPS64 relocation record format in
yaml2obj/obj2yaml tools by introducing new optional Relocation fields:
Type2, Type3, and SpecSym. These fields are recognized only if the
object/YAML file relates to the MIPS64 target.

Differential Revision: http://reviews.llvm.org/D7136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 13:29:25 +00:00
Elena Demikhovsky
717d41d8c3 AVX-512: Changes in operations on masks registers for KNL and SKX
- Added KSHIFTB/D/Q for skx
- Added KORTESTB/D/Q for skx
- Fixed store operation for v8i1 type for KNL
- Store size of v8i1, v4i1 and v2i1 are changed to 8 bits



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 12:47:15 +00:00
NAKAMURA Takumi
c4fbd5d26b Orc/IRCompileLayer.h: Avoid non-static initializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 11:41:56 +00:00
NAKAMURA Takumi
4df70bbd17 OrcJIT: Avoid non-static initializers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227041 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 11:41:49 +00:00
NAKAMURA Takumi
2edd9a9db8 Orc/LLVMBuild.txt: Prune redundant "Target" in libdeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 11:41:41 +00:00
Craig Topper
ff763041d2 [X86] Give scalar VRNDSCALE instructions priority in AVX512 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227039 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:49:22 +00:00
Craig Topper
e3792c042d Simplify a multiclass. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227038 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:49:19 +00:00
Craig Topper
e237954ed8 Remove tab characters. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:45:32 +00:00
Elena Demikhovsky
70bae89669 Implemented cost model for masked load/store operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:44:46 +00:00
Craig Topper
896c1e9b70 [X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make the assembler bounds check them. It will also make them print as unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227032 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:16 +00:00
Craig Topper
046047ccc3 [X86] Use u8imm in several places that used i32i8imm that don't require an i32 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:13 +00:00
Craig Topper
a92d03bb7a Remove tab characters. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:11 +00:00
Chandler Carruth
d9556bd73f [PM] Remove the restricted visibility from the instcombine worklist. Now
that library consumers access the instcombine pass directly, they also
(transitively) access the worklist. Also, it would need to be used
directly in order to have a useful utility if we ever want that.

This should fix some warnings since I moved this code. Sorry for the
trouble.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227025 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 00:30:05 +00:00
Lang Hames
5c7cc95d47 Remove a few more redundant ExecutionEngine regression tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227021 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 22:41:13 +00:00
Charlie Turner
c7efed60ef Fixup debug information references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 21:51:21 +00:00
Charlie Turner
7f58cf305f Update references to lines of code count.
The number of lines of code in Kaleidoscope has risen from the
previously reported 700 to 986 according to the cloc tool. This tools
was run on the toy.cpp file from Chapter 8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 21:51:17 +00:00
Justin Bogner
c937185054 InstrProf: Add operator!= to coverage counters
I'll use this in clang shortly. Also makes the operator definition
style more consistent in this class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 21:13:23 +00:00