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8151 Commits

Author SHA1 Message Date
Richard Osborne
c96c8e0e81 Add some peepholes for signed comparisons using ashr X, X, 32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 15:38:17 +00:00
Bob Wilson
67a6103a34 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83528 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 06:02:10 +00:00
Bob Wilson
deb3141cf5 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 05:18:18 +00:00
Mikhail Glushenkov
39482dde66 Input files should go before all other options. 
Important, for example, when calling 'gcc a.o b.o c.o -lD -lE -lF'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83524 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 04:40:08 +00:00
Bob Wilson
5adf60c03b Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:28:28 +00:00
Bob Wilson
24e04c535f Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:21:01 +00:00
Bob Wilson
0ea38bb939 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:54:04 +00:00
Bob Wilson
fe27c512e8 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83507 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:47:21 +00:00
Bob Wilson
c67160c010 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:39:57 +00:00
Bob Wilson
a4288080e6 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:57:01 +00:00
Dale Johannesen
5f3663e51d Fix handling of x86 'R' constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:47:20 +00:00
Bob Wilson
b2cae81ac4 Convert more NEON tests to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83497 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:30:19 +00:00
Kevin Enderby
5440f6309d Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so 
that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83488 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:57:20 +00:00
Bob Wilson
99c372e723 Convert test to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83487 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:51:42 +00:00
Bob Wilson
63c9063434 Add codegen support for NEON vst4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:49:18 +00:00
Bob Wilson
66a70639da Add codegen support for NEON vst3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:30:08 +00:00
Bob Wilson
d285575f87 Add codegen support for NEON vst2 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:47:39 +00:00
Bob Wilson
7708c22baa Add codegen support for NEON vld4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83479 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:09:32 +00:00
Bob Wilson
ff8952e8a9 Add codegen support for NEON vld3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 17:24:55 +00:00
Bob Wilson
967f87578d Add tests for vld2 of 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 17:19:13 +00:00
Bob Wilson
ec1d81c389 Update NEON struct names to match llvm-gcc changes. 
(This is not required for correctness but might help with sanity.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 21:16:19 +00:00
Dan Gohman
e3cc3f3c84 Instead of printing unnecessary basic block labels as labels in 
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83392 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 17:38:38 +00:00
Chris Lattner
7963e15951 remove predicate simplifier, it never got the last bugs beaten 
out of it, and jump threading, condprop and gvn are now getting
most of the benefit.  This was approved by Nicholas and Nicolas.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83390 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 16:59:46 +00:00
Jeffrey Yasskin
4ece4e26f2 Add a test for http://llvm.org/PR3043. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83346 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 23:51:08 +00:00
Evan Phoenix
1614e50d9f Extend ConstantFolding to understand signed overflow variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 22:53:52 +00:00
Chris Lattner
e65cd40ab9 teach the optimizer how to constant fold uadd/usub intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 05:26:04 +00:00
Chris Lattner
bbc33853a5 instcombine shouldn't delete all null checks for mallocs. 
This fixes PR5130.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83290 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 02:47:47 +00:00
Torok Edwin
e1b691f208 Fix make rule when objdir is inside srcdir. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83243 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 09:30:03 +00:00
Evan Cheng
3825ce8c24 Fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83241 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 06:53:57 +00:00
Evan Cheng
0bc1e0b8ee Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83240 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 06:50:50 +00:00
Evan Cheng
6ad9da4001 C++ member functions must be 2 byte aligned per ABI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83239 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 06:07:47 +00:00
Evan Cheng
892597943a Forgot about ARM::tPUSH. It also has a new writeback operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 05:03:07 +00:00
Evan Cheng
62a1b5db44 Move load / store multiple before post-alloc scheduling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 04:57:15 +00:00
Evan Cheng
1ec8e194eb Test case for aligned attribute on function declaration. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83234 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 04:45:37 +00:00
David Goodwin
9843a93e83 Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 22:19:57 +00:00
David Goodwin
471850ab84 Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 21:46:35 +00:00
Evan Cheng
10469f8e48 ARM::tPOP and tPOP_RET each has an extra writeback operand now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 20:54:53 +00:00
Chris Lattner
99be299edb remove the GVNPRE pass. It has been subsumed by the GVN pass. 
Ok'd by Owen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83193 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 02:18:36 +00:00
Evan Cheng
48af260bb1 Forgot this test earlier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83143 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 08:41:27 +00:00
David Goodwin
413738ee8c Remove regression that requires post-RA scheduling from a target that does not use that scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83128 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:23:57 +00:00
David Goodwin
0dad89fa94 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:10:16 +00:00
David Goodwin
8971c4a30e Post-RA regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83075 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 17:10:26 +00:00
Evan Cheng
fa1be5d991 Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83058 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 07:07:30 +00:00
Devang Patel
0475c9170e Parse custom metadata attached with an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83033 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 00:01:14 +00:00
Dan Gohman
ff2483a109 Add a testcase for r83011. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 21:03:02 +00:00
Dan Gohman
8c050fadf6 Add a CHECK line to check the position of the second divsd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 20:48:39 +00:00
Dan Gohman
c60e0bec11 Add a testcase to help test analysis preservation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83002 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 18:40:27 +00:00
Evan Cheng
5adb66a646 Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo 
instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 09:14:39 +00:00
Chris Lattner
3ddfb21306 The select instruction is not neccesarily in the same block as the 
phi nodes.  Make sure to phi translate from the right block. 

This fixes a llvm-building-llvm failure on GVN-PRE.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82970 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 06:49:44 +00:00
Evan Cheng
0e6b590b91 Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of 
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 05:28:43 +00:00