Commit Graph

80401 Commits

Author SHA1 Message Date
Anna Zaks
cfd8f11d48 [asan] Prevent __attribute__((annotate)) triggering errors on Darwin
The following code triggers a fatal error in the compiler instrumentation
of ASan on Darwin because we place the attribute into llvm.metadata section,
which does not have the proper MachO section name.

void foo() __attribute__((annotate("custom")));
void foo() {;}

This commit reorders the checks so that we skip everything in llvm.metadata
first. It also removes the hard failure in case the section name does not
parse. That check will be done lower in the compilation pipeline anyway.

(Reviewed in http://reviews.llvm.org/D9093.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:58:08 +00:00
Matt Arsenault
d2f17c4e2b Implement computeKnownBits for min/max nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:41 +00:00
Matt Arsenault
0f59d850fa R600: Switch to using generic min / max nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:37 +00:00
Matt Arsenault
d99ce2f630 MC: Add target hook to control symbol quoting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:31:39 +00:00
Arnold Schwaighofer
d386615ed3 Fix unused variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:17:40 +00:00
Jingyue Wu
4e04297ac3 [NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces
Summary:
This cleans up most allocas NVPTXLowerKernelArgs emits for byval
parameters.

Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store.

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239368 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:05:56 +00:00
Arnold Schwaighofer
04ed4447ee MergeFunctions: Impose a total order on the replacement of functions
We don't want to replace function A by Function B in one module and Function B
by Function A in another module.

If these functions are marked with linkonce_odr we would end up with a function
stub calling B in one module and a function stub calling A in another module. If
the linker decides to pick these two we will have two stubs calling each other.

rdar://21265586

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:03:29 +00:00
Reid Kleckner
38a2b24c12 [WinEH] Cache declarations of frame intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 22:43:32 +00:00
Reid Kleckner
b65591326e Fix clang-cl self-host -Wc++11-narrowing bug
Use unsigned as the underlying storage type of the AMDGPU address space
enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:57:57 +00:00
Ranjeet Singh
1666977cd0 [AArch64] AsmParser should be case insensitive about accepting vector register names.
Differential Revision: http://reviews.llvm.org/D10320


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:32:16 +00:00
Keno Fischer
4332f869bf [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:09:58 +00:00
Benjamin Kramer
9ebaf8ce67 Prefer copy init over direct init. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:58:57 +00:00
Akira Hatanaka
fa6bc2e94d [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:50:43 +00:00
Pete Cooper
d354befbbb Use a PointerUnion in MCSymbol for Section and Fragment. NFC.
The Fragment and Section, and a bool for HasFragment were all used to create
a PointerUnion.  Just use a pointer union instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:41:57 +00:00
Pete Cooper
e2101ba7b5 Remove includes of MCMachOSymbolFlags.h after it was deleted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:25:57 +00:00
Pete Cooper
d3869ee8d2 Move all flags logic to MCSymbolMachO.
Also delete the now unused MCMachOSymbolFlags.h header as the only enum in there was moved to MCSymbolMachO.

Similarly to ELF and COFF, manipulating the flags is now done via helpers instead of spread
throughout the codebase.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239316 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:28 +00:00
Pete Cooper
cae8bc4504 Add MCSymbolMachO which will be used to hide the MCSymbolMachO flags.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:23 +00:00
Pete Cooper
e25e889c7c Move all of the MCSymbol COFF flags logic in to MCSymbolCOFF.
All flags setting/getting is now done in the class with helper methods instead
of users having to get the bits in the correct order.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:19 +00:00
Pete Cooper
f560b88d7c Add MCSymbolCOFF class and use it to get and set the COFF type field.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:12 +00:00
Pete Cooper
62f764a6c9 Change MCSymbol IsELF to an enum to support future MCSymbolCOFF and MCSymbolMachO.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:09 +00:00
Matthias Braun
b0d6c659b7 X86: Reject register operands with obvious type mismatches.
While we have some code to transform specification like {ax} into
{eax}/{rax} if the operand type isn't 16bit, we should reject cases
where there is no sane way to do this, like the i128 type in the
example.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:56:23 +00:00
Oliver Stannard
7c40b1a7bc Fix assertion failure in global-merge with unused ConstantExpr
The global-merge pass was crashing because it assumes that all ConstantExprs
(reached via the global variables that they use) have at least one user.

I haven't worked out a way to test this, as an unused ConstantExpr cannot be
represented by serialised IR, and global-merge can only be run in llc, which
does not run any passes which can make a ConstantExpr dead.

This (reduced to the point of silliness) C code triggers this bug when compiled
for arm-none-eabi at -O1:

  static a = 7;
  static volatile b[10] = {&a};

  c;
  main() {
    c = 0;
    for (; c < 10;)
      printf(b[c]);
  }

Differential Revision: http://reviews.llvm.org/D10314



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:55:31 +00:00
Colin LeMahieu
838271c858 [Hexagon] Adding functionality for searching for compound instruction pairs. Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:34:47 +00:00
Simon Pilgrim
298222a930 [DAGCombiner] Added CTLZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:19:00 +00:00
Javed Absar
d48ce2c34f ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 15:01:11 +00:00
Petar Jovanovic
f8aad6c1ef [Mips64][mcjit] Add R_MIPS_PC32 relocation
This patch adds R_MIPS_PC32 relocation for Mips64.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10235


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:10:23 +00:00
Igor Breger
17e24879cb AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:03:17 +00:00
Artur Pilipenko
1328b67dd1 Minor refactoring of GEP handling in isDereferenceablePointer
For GEP instructions isDereferenceablePointer checks that all indices are constant and within bounds. Replace this index calculation logic to a call to accumulateConstantOffset. Separated from the http://reviews.llvm.org/D9791

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D9874


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239299 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 11:58:13 +00:00
Silviu Baranga
a420a14276 [LAA] Fix estimation of number of memchecks
Summary:
We need to add a runtime memcheck for pair of accesses (x,y) where at least one of x and y
are writes.
 
Assuming we have w writes and r reads, currently this number is  estimated as being
w* (w+r-1). This estimation will count (write,write) pairs twice and will overestimate
the number of checks required.

This change adds a getNumberOfChecks method to RuntimePointerCheck, which
will count the number of runtime checks needed (similar in implementation to
needsAnyChecking) and uses it to produce the correct number of runtime checks.

Test Plan:
llvm test suite
spec2k
spec2k6

Performance results: no changes observed (not surprising since the formula for 1 writer is basically the same, which would covers most cases - at least with the current check limit).

Reviewers: anemet

Reviewed By: anemet

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D10217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 10:27:06 +00:00
Simon Pilgrim
d72b357107 [DAGCombiner] Added CTTZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 09:57:09 +00:00
Hao Liu
43be1d53d1 [LoopVectorize] Teach Loop Vectorizor about interleaved memory accesses.
Interleaved memory accesses are grouped and vectorized into vector load/store and shufflevector.
E.g. for (i = 0; i < N; i+=2) {
       a = A[i];         // load of even element
       b = A[i+1];       // load of odd element
       ...               // operations on a, b, c, d
       A[i] = c;         // store of even element
       A[i+1] = d;       // store of odd element
     }

  The loads of even and odd elements are identified as an interleave load group, which will be transfered into vectorized IRs like:
     %wide.vec = load <8 x i32>, <8 x i32>* %ptr
     %vec.even = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     %vec.odd = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>

  The stores of even and odd elements are identified as an interleave store group, which will be transfered into vectorized IRs like:
     %interleaved.vec = shufflevector <4 x i32> %vec.even, %vec.odd, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> 
     store <8 x i32> %interleaved.vec, <8 x i32>* %ptr

This optimization is currently disabled by defaut. To try it by adding '-enable-interleaved-mem-accesses=true'. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 06:39:56 +00:00
Hao Liu
f60ff6bdf6 [LoopAccessAnalysis] Teach LAA to check the memory dependence between strided accesses.
Differential Revision: http://reviews.llvm.org/D9368


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239285 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 04:48:37 +00:00
Michael Zolotukhin
3148e98284 Remove SCEVCache and FindConstantPointers from complete loop unrolling heuristic.
Summary:
Using some SCEV functionality helped to entirely remove SCEVCache class and FindConstantPointers SCEV visitor.
Also, this makes the code more universal - I'll take advandate of it in next patches where I start handling additional types of instructions.

Test Plan: Tests would be submitted in subsequent patches.

Reviewers: atrick, chandlerc

Reviewed By: atrick, chandlerc

Subscribers: atrick, llvm-commits

Differential Revision: http://reviews.llvm.org/D10205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239282 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 03:28:06 +00:00
Peter Collingbourne
3120bcb0de Fix Windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239279 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 02:43:32 +00:00
Peter Collingbourne
ee2e3d0eb9 llvm-ar: Move archive writer to Object.
No functional change intended, other than some minor changes to certain
diagnostics.

Differential Revision: http://reviews.llvm.org/D10296

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239278 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 02:32:01 +00:00
Matt Arsenault
d9ac3ec939 SeparateConstOffsetFromGEP: Pass address space to isLegalAddressingMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239262 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 20:17:44 +00:00
Matt Arsenault
4d1a5272ec Make NaryReassociate pass the address space to isLegalAddressingMode
No test since the kinds of transforms this prevents seem to not really
be relevant for SI's different addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239261 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 20:17:42 +00:00
Matt Arsenault
4e8236ed75 Add isLegalAddressingMode address space argument to TTI
Update to match the TLI version, and remove the TLI version's
default argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239260 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 20:12:03 +00:00
Simon Pilgrim
4c4f0921dc [X86] Added BitScanForward/BitScanReverse memory folding + tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 18:34:25 +00:00
Benjamin Kramer
7dcbed058f Remove global std::string. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239254 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 16:36:28 +00:00
Simon Pilgrim
43421abda8 [DAGCombiner] Added CTPOP vector constant folding support.
Added tests to the existing SSE/AVX test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239252 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 15:37:14 +00:00
Benjamin Kramer
aa8479458e [AsmWriter] Rewrite module asm printing using StringRef::split.
No change in output intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 13:59:33 +00:00
Filipe Cabecinhas
b241325294 Fix doxygen comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239250 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 06:40:24 +00:00
David Majnemer
134cb22902 [InstCombine, InstSimplify] Move xforms from Combine to Simplify
There were several SelectInst combines that always returned an existing
instruction instead of modifying an old one or creating a new one.
These are prime candidates for moving to InstSimplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239229 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 22:40:21 +00:00
Filipe Cabecinhas
ce986b6bc0 Use early return idiom. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239228 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 20:44:53 +00:00
Colin LeMahieu
2ca8f0f5d6 [MC] Common symbols weren't being checked for redeclaration which allowed an assembly file to generate an assertion in setCommon(): !isCommon(). This change allows redeclaration as long as the size and alignment match exactly, otherwise report a fatal error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 20:12:40 +00:00
Sanjoy Das
68081f41fa [LoopUnroll] Fix truncation bug in canUnrollCompletely.
Summary:
canUnrollCompletely takes `unsigned` values for `UnrolledCost` and
`RolledDynamicCost` but is passed in `uint64_t`s that are silently
truncated.  Because of this, when `UnrolledSize` is a large integer
that has a small remainder with UINT32_MAX, LLVM tries to completely
unroll loops with high trip counts.

Reviewers: mzolotukhin, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239218 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 05:24:10 +00:00
David Majnemer
e46e8af4d7 [CVP] Don't assume Constants of type i1 can be known to be true or false
CVP wants to analyze the condition operand of a select along an edge.
It succeeds in getting back a Constant but not a ConstantInt.  Instead,
it gets a ConstantExpr.  It then assumes that the Constant must be equal
to false because it isn't equal to true.

Instead, perform an additional comparison.

This fixes PR23752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239217 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 04:56:51 +00:00
David Majnemer
b21b529990 [InstCombine] Don't miscompile select to poison
If we have (select a, b, c), it is sometimes valid to simplify this to a
single select operand.  However, doing so is only valid if the
computation doesn't inject poison into the computation.

It might be helpful to consider the following example:
  (select (icmp ne %i, INT_MAX), (add nsw %i, 1), INT_MIN)

The select is equivalent to (add %i, 1) but not (add nsw %i, 1).

Self hosting on x86_64 revealed that this occurs very, very rarely so
bailing out is hopefully pretty reasonable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239215 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 02:30:43 +00:00
Rafael Espindola
dcb11d3206 Handle 16 bit PC relative relocations.
Fixes pr23771.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 02:29:56 +00:00