Commit Graph

30496 Commits

Author SHA1 Message Date
James Y Knight
d280420ee9 [SPARC] Repair GOT references to internal symbols.
They had been getting emitted as a section + offset reference, which
is bogus since the value needs to be the offset within the GOT, not
the actual address of the symbol's object.

Differential Revision: http://reviews.llvm.org/D10441

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 15:05:15 +00:00
Rafael Espindola
f314160e32 Convert a few tests to use llvm-mc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240017 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 13:39:07 +00:00
Simon Pilgrim
d492018dca [X86][AVX2] Added AVX2 SINT_TO_FP/UINT_TO_FP tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:32:28 +00:00
Asaf Badouh
bc5667c7ac [AVX512]
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:30:53 +00:00
Elena Demikhovsky
6c24289bef AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:56:19 +00:00
Elena Demikhovsky
f3d6e24ca4 reverted 239999 due to test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240001 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:06:49 +00:00
Elena Demikhovsky
5686493ccc AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD
and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239999 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 07:29:40 +00:00
Benjamin Kramer
24e04b80a5 [AsmPrinter] Make isRepeatedByteSequence smarter about odd integer types
- zext the value to alloc size first, then check if the value repeats
  with zero padding included. If so we can still emit a .space
- Do the checking with APInt.isSplat(8), which handles non-pow2 types
- Also handle large constants (bit width > 64)
- In a ConstantArray all elements have the same type, so it's sufficient
  to check the first constant recursively and then just compare if all
  following constants are the same by pointer compare

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 23:55:17 +00:00
Simon Pilgrim
6ebf741ea2 [X86][SSE] Improved support for vector i16 to float conversions.
Added explicit sign extension for v4i16/v8i16 to v4i32/v8i32 before conversion to floats. Matches existing support for v4i8/v8i8.

Follow up to D10433


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239966 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 22:43:34 +00:00
Jingyue Wu
ee36276e53 Add NVPTXLowerAlloca pass to convert alloca'ed memory to local address
Summary:
This is done by first adding two additional instructions to convert the
alloca returned address to local and convert it back to generic. Then
replace all uses of alloca instruction with the converted generic
address. Then we can rely NVPTXFavorNonGenericAddrSpace pass to combine
the generic addresscast and the corresponding Load, Store, Bitcast, GEP
Instruction together.

Patched by Xuetian Weng (xweng@google.com). 

Test Plan: test/CodeGen/NVPTX/lower-alloca.ll

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: meheff, broune, eliben, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239964 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 22:31:02 +00:00
David Majnemer
cc714e2142 Move the personality function from LandingPadInst to Function
The personality routine currently lives in the LandingPadInst.

This isn't desirable because:
- All LandingPadInsts in the same function must have the same
  personality routine.  This means that each LandingPadInst beyond the
  first has an operand which produces no additional information.

- There is ongoing work to introduce EH IR constructs other than
  LandingPadInst.  Moving the personality routine off of any one
  particular Instruction and onto the parent function seems a lot better
  than have N different places a personality function can sneak onto an
  exceptional function.

Differential Revision: http://reviews.llvm.org/D10429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:52:32 +00:00
Ahmed Bougacha
4412d4b51f [CodeGenPrepare] Generalize inserted set from truncs to any inst.
It's been used before to avoid infinite loops caused by separate CGP
optimizations undoing one another.  We found one more such issue
caused by r238054.  To avoid it, generalize the "InsertedTruncs"
set to any inst, and use it to avoid touching those again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:44:32 +00:00
Colin LeMahieu
6fc90b32e3 [Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239935 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:29:33 +00:00
Peter Collingbourne
1c63fe6c61 LowerBitSets: Do not assign names to aliases of unnamed bitset element objects.
The restriction on unnamed aliases was removed in r239921. Mostly reverts
r239590, but we keep the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 18:31:02 +00:00
Rafael Espindola
43e5349f89 Allow aliases to be unnamed.
If globals can be unnamed, there is no reason for aliases to be different.

The restriction was there since the original implementation in r36435. I
can only guess it was there because of the old bison parser for the old
alias syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239921 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 17:53:31 +00:00
Colin LeMahieu
7540f2c60a [Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239917 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 17:19:05 +00:00
Diego Novillo
5057ee8357 Add documentation for new backedge mass propagation in irregular loops.
Tweak test cases and rename headerIndexFor -> getHeaderIndex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 16:28:22 +00:00
Benjamin Kramer
4bf8188289 [MC/Dwarf] Encode DW_CFA_advance_loc in target endianess.
This matches GNU as output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 15:14:35 +00:00
Toma Tabacu
d510c1085a [mips] [IAS] Add support for expanding LASym with a source register operand.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239910 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 14:31:51 +00:00
Toma Tabacu
279a212ca2 [mips] [IAS] Add support for the B{L,G}{T,E}(U) branch pseudo-instructions.
Summary:
This does not include support for the immediate variants of these pseudo-instructions.
Fixes llvm.org/PR20968.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D8537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 13:20:24 +00:00
Toma Tabacu
87f93f5387 [mips] [IAS] Fix LA with relative label operands.
Summary:
Call MCSymbolRefExpr::create() with a MCSymbol* argument, not with a StringRef
of the Symbol's name, in order to avoid creating invalid temporary symbols for
relative labels (e.g. {$,.L}tmp00, {$,.L}tmp10 etc.).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 12:30:37 +00:00
Toma Tabacu
d3b8136e1d [mips] [IAS] Add test for SW with relative label operands. NFC.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10497

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239899 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 11:46:37 +00:00
Toma Tabacu
e7684db38f [mips] [IAS] Fix LW with relative label operands.
Summary:
Previously, MCSymbolRefExpr::create() was called with a StringRef of the symbol
name, which it would then search for in the Symbols StringMap (from MCContext).

However, relative labels (which are temporary symbols) are apparently not stored
in the Symbols StringMap, so we end up creating a new {$,.L}tmp symbol
({$,.L}tmp00, {$,.L}tmp10 etc.) each time we create an MCSymbolRefExpr by
passing in the symbol name as a StringRef.

Fortunately, there is a version of MCSymbolRefExpr::create() which takes an
MCSymbol* and we already have an MCSymbol* at that point, so we can just pass
that in instead of the StringRef.

I also removed the local StringRef calls to MCSymbolRefExpr::create() from
expandMemInst(), as those cases can be handled by evaluateRelocExpr() anyway.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 10:43:45 +00:00
Igor Breger
a066970605 AVX-512: cvtusi2ss/d intrinsics.
Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D10473

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 07:23:57 +00:00
Matthias Braun
e460807bcd Revert "AArch64: Use CMP;CCMP sequences for and/or/setcc trees."
The patch triggers a miscompile on SPEC 2006 403.gcc with the (ref)
200.i and scilab.i inputs. I opened PR23866 to track analysis of this.

This reverts commit r238793.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 04:02:32 +00:00
Colin LeMahieu
360661f1d1 [Hexagon] Adding MC ELF streamer and updating addend relocation test which shows correct ELF symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 03:06:16 +00:00
Sanjay Patel
f0cbe326ff Add some tests based on PR21711
These were originally added in r227242,
but that patch was reverted because it
caused a failure on AArch64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 22:37:50 +00:00
Simon Atanasyan
3bcfd461f6 [llvm-readobj] Print MIPS .reginfo section content
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 21:47:43 +00:00
Simon Pilgrim
e2d3e4467e [X86][SSE] Vectorize v2i32 to v2f64 conversions
This patch enables support for the conversion of v2i32 to v2f64 to use the CVTDQ2PD xmm instruction and stay on the SSE unit instead of scalarizing, sign extending to i64 and using CVTSI2SDQ scalar conversions.

Differential Revision: http://reviews.llvm.org/D10433

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 21:40:28 +00:00
Philip Reames
489a03c754 Reapply 239795 - [InstCombine] Propagate non-null facts to call parameters
The original change broke clang side tests.  I will be submitting those momentarily.  This change includes post commit feedback on the original change from from Pete Cooper.

Original Submission comments:
If a parameter to a function is known non-null, use the existing parameter attributes to record that fact at the call site. This has no optimization benefit by itself - that I know of - but is an enabling change for http://reviews.llvm.org/D9129.

Differential Revision: http://reviews.llvm.org/D9132



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:24:25 +00:00
Rafael Espindola
0c650627ca Improve handling of end of file in the bitcode reader.
Before this patch the bitcode reader would read a module from a file
that contained in order:

* Any number of non MODULE_BLOCK sub blocks.
* One MODULE_BLOCK
* Any number of non MODULE_BLOCK sub blocks.
* 4 '\n' characters to handle OS X's ranlib.

Since we support lazy reading of modules, any information that is relevant
for the module has to be in the MODULE_BLOCK or before it. We don't gain
anything from checking what is after.

This patch then changes the reader to stop once the MODULE_BLOCK has been
successfully parsed.

This avoids the ugly special case for .bc files in an archive and makes it
easier to embed bitcode files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:03:39 +00:00
Diego Novillo
3f53fc8f5f Fix PR 23525 - Separate header mass propagation in irregular loops.
Summary:
When propagating mass through irregular loops, the mass flowing through
each loop header may not be equal. This was causing wrong frequencies
to be computed for irregular loop headers.

Fixed by keeping track of masses flowing through each of the headers in
an irregular loop. To do this, we now keep track of per-header backedge
weights. After the loop mass is distributed through the loop, the
backedge weights are used to re-distribute the loop mass to the loop
headers.

Since each backedge will have a mass proportional to the different
branch weights, the loop headers will end up with a more approximate
weight distribution (as opposed to the current distribution that assumes
that every loop header is the same).

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239843 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 19:10:58 +00:00
Igor Laevsky
bfbac55e4e [Statepoints] Test only change. Check that statepoint lowering didn't generate more than expected amount of spills.
See http://reviews.llvm.org/D10402 for related discussion.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 19:07:05 +00:00
Frederic Riss
37c67e6bb6 Have MachOObjectFile::isValidArch() accept armv7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239833 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 17:37:03 +00:00
Alex Lorenz
d8a0ff34d9 MIR Parser: Report an error when a machine function doesn't have a corresponding function.
This commit reports an error when a machine function from a MIR file that contains
LLVM IR can't find a function with the same name in the loaded LLVM IR module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10468


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 17:06:29 +00:00
Rafael Espindola
0021a54ae5 Add a test for padded bitcode files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239829 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:36:15 +00:00
Kit Barton
1b26bfbef1 Properly handle the mftb instruction.
The mftb instruction was incorrectly marked as deprecated in the PPC
Backend. Instead, it should not be treated as deprecated, but rather be
implemented using the mfspr instruction. A similar patch was put into GCC last
year. Details can be found at:

https://sourceware.org/ml/binutils/2014-11/msg00383.html.
This change will replace instances of the mftb instruction with the mfspr
instruction for all CPUs except 601 and pwr3. This will also be the default
behaviour.

Additional details can be found in:

https://llvm.org/bugs/show_bug.cgi?id=23680

Phabricator review: http://reviews.llvm.org/D10419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:01:15 +00:00
Matt Arsenault
5202cab841 Revert "Revert "Fix merges of non-zero vector stores""
Reapply r239539. Don't assume the collected number of
stores is the same vector size. Just take the first N
stores to fill the vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 15:51:48 +00:00
Benjamin Kramer
8a8bb45a76 [InstSimplify] Allow folding of fdiv X, X with just NaNs ignored
Any combination of +-inf/+-inf is NaN so it's already ignored with
nnan and we can skip checking for ninf. Also rephrase logic in comments
a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239821 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 14:57:29 +00:00
Daniel Sanders
b17a563e9a [mips][ias] Expand on r238751 to cover as many relocs as possible.
Summary:
Relocs that can be converted from absolute to PC-relative now do so if IsPCRel
is true. Relocs that require PC-relative now call llvm_unreachable() if IsPCRel
is false and similarly those that require absolute assert that IsPCRel is false.

Note that while it looks like some relocs (e.g. R_MIPS_26) can be converted into
the MIPS32r6/MIPS64r6 relocs (R_MIPS_PC*_S2), it isn't actually valid to do so.

Placeholders have been left in the testcase for unsupported relocs and relocs
that cannot be generated at the moment.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits, rafael

Differential Revision: http://reviews.llvm.org/D10184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239817 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 13:46:26 +00:00
Daniel Sanders
a8cc053519 [llvm-mc] The object form of the GNU triple should be the same as the string form.
Summary:
GetTarget() may modify TripleName without also updating TheTriple.
This can lead to situations where the MCObjectStreamer has a different triple
to the rest of LLVM.

This inconsistency caused sparc-little-endian.s to pass on Windows because most
of LLVM had sparcel-pc-win32 while MCObjectStreamer had "". I believe the same
kind of thing was also true of Darwin.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin, rafael

Differential Revision: http://reviews.llvm.org/D10450

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239808 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 09:57:38 +00:00
Asaf Badouh
7ae3494732 [AVX512] add integer min/max intrinsics support.
review:
http://reviews.llvm.org/D10439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 08:39:27 +00:00
NAKAMURA Takumi
4ec9824e8c Disable llvm/test/CodeGen/MIR/machine-function.mir on x86 msc18 for now. Investigating.
The emission was as below;

  ---
  name:            foo
  alignment:       31428584
  exposesReturnsTwice: true
  hasInlineAsm:    false
  ...
  ---
  name:            bar
  alignment:       1701667182
  exposesReturnsTwice: false
  hasInlineAsm:    false
  ...
  ---
  name:            func
  alignment:       8
  exposesReturnsTwice: false
  hasInlineAsm:    false
  ...
  ---
  name:            func2
  alignment:       16
  exposesReturnsTwice: true
  hasInlineAsm:    true
  ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239805 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 06:57:35 +00:00
Elena Demikhovsky
05e61f7113 X86: optimized i64 vector multiply with constant
When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction.
When one of the operands is a constant, the upper part may be zero, we know this at compile time.
Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>.
I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 06:07:24 +00:00
Philip Reames
f8848a8149 Revert 239795
I forgot to update some clang test cases.  I'll fix and resubmit tomorrow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239800 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 01:20:53 +00:00
Ahmed Bougacha
819a6b7d4b [AArch64] Generalize extract-high DUP extension to MOVI/MVNI.
These are really immediate DUPs, and suffer from the same problem
with long instructions with a high/2 variant (e.g. smull).

By extending a MOVI (or DUP, before this patch), we can avoid an ext
on the other operand of the long instruction, e.g. turning:
    ext.16b v0, v0, v0, #8
    movi.4h v1, #0x53
    smull.4s  v0, v0, v1
into:
    movi.8h v1, #0x53
    smull2.4s  v0, v0, v1

While there, add a now-necessary combine to fold (VT NVCAST (VT x)).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 01:18:14 +00:00
Ahmed Bougacha
d4521f1dd5 [AArch64] Robustize neon-2velem-high test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 01:05:39 +00:00
Philip Reames
6025d734a8 [InstCombine] Propagate non-null facts to call parameters
If a parameter to a function is known non-null, use the existing parameter attributes to record that fact at the call site. This has no optimization benefit by itself - that I know of - but is an enabling change for http://reviews.llvm.org/D9129.

Differential Revision: http://reviews.llvm.org/D9132



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 00:43:54 +00:00
Alex Lorenz
00b6413c97 MIR Serialization: Print and parse simple machine function attributes.
This commit serializes the simple, scalar attributes from the 
'MachineFunction' class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10449


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 00:10:47 +00:00
Alex Lorenz
034945e8fe MIR Serialization: Create dummy functions when the MIR file doesn't have LLVM IR.
This commit creates a dummy LLVM IR function with one basic block and an unreachable
instruction for each parsed machine function when the MIR file doesn't have LLVM IR.
This change is required as the machine function analysis pass creates machine
functions only for the functions that are defined in the current LLVM module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10135


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:07:38 +00:00