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12737 Commits

Author SHA1 Message Date
Eric Christopher
d31df87f41 Temporarily revert r129408 to see if it brings the bots back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129417 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-13 00:20:59 +00:00
Johnny Chen
55e6419b12 Add sanity check for Ld/St Dual forms of Thumb2 instructions. 
rdar://problem/9273947


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129411 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 23:31:00 +00:00
Eric Christopher
8e98de9979 Fix a bug where we were counting the alias sets as completely used 
registers for fast allocation.

Fixes rdar://9207598


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129408 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 23:23:14 +00:00
Bill Wendling
f9b2dc66c8 Revert r129401 for now. Clang is using the old way of doing things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129403 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 22:59:27 +00:00
Bill Wendling
d5f323d70b Remove the unaligned load intrinsics in favor of using native unaligned loads. 
Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.

First part of <rdar://problem/8460511>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129401 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 22:46:31 +00:00
Oscar Fuentes
2a2bc5ccee Fix compiler command line used by lit.py when working with NMake 
generators. It may improve robustness when testing from VS too.

Based on a patch by David Neto!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129398 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 22:10:38 +00:00
Johnny Chen
ec51a6225c The Thumb2 RFE instructions need to have their second halfword fully specified. 
In addition, the base register is not rGPR, but GPR with th exception that:

    if n == 15 then UNPREDICTABLE

rdar://problem/9273836


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129391 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 21:41:51 +00:00
Johnny Chen
32cefad4b3 Add bad register checks for Thumb2 Ld/St instructions. 
rdar://problem/9269047


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129387 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 21:17:51 +00:00
Andrew Trick
c558bf3972 Revert 129383. It causes some targets to hit a scheduler assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129385 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 20:14:07 +00:00
Andrew Trick
3eb4319313 PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make these heuristic adjustments to node latency work,
I also needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129383 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 19:54:36 +00:00
Johnny Chen
f9ce2cba42 The Thumb2 Ld, St, and Preload instructions with the i12 forms should have its Inst{23} 
be specified as '1' (add = TRUE).

Also add a utility function for Thumb2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129377 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 18:48:00 +00:00
Johnny Chen
49fdfe3ce5 Print out a debug message when the reglist fails the sanity check for Thumb Ld/St Multiple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129365 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 17:09:04 +00:00
Rafael Espindola
25f492e778 Fix the case of a .cfi_rel_offset before any .cfi_def_cfa_offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 16:12:03 +00:00
Rafael Espindola
c57543964d Implement .cfi_same_value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129361 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 15:31:05 +00:00
Cameron Zwarich
d0aacbcc2e Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM 
stores of arguments in the same cache line. This fixes the second half of
<rdar://problem/8674845>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 02:24:17 +00:00
Johnny Chen
163b6eaf25 Add one test case (svc). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129327 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 00:21:48 +00:00
Eric Christopher
05f9e4e8bd Match case for invalid constant error messages and add a new 
test for invalid hexadecimals.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129326 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 00:18:03 +00:00
Johnny Chen
e77f72d7d2 A8.6.16 B 
Encoding T1 (tBcc)
if cond == '1110' then UNDEFINED;

rdar://problem/9268681


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 00:14:49 +00:00
Dan Gohman
dac5dbadeb Fix reassociate to use a worklist instead of recursing when new 
reassociation opportunities are exposed. This fixes a bug where
the nested reassociation expects to be the IR to be consistent,
but it isn't, because the outer reassociation has disconnected
some of the operands.  rdar://9167457


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 00:11:56 +00:00
Eric Christopher
164254d77c Test for invalid constant expr addition - bad octal constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 00:03:38 +00:00
Johnny Chen
de16508955 Thumb disassembler was erroneously rejecting "blx sp" instruction. 
rdar://problem/9267838


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 23:33:30 +00:00
Chris Lattner
b5f18f5df0 remove the StructRetPromotion pass. It is unused, not maintained and 
has some bugs.  If this is interesting functionality, it should be 
reimplemented in the argpromotion pass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129314 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 23:09:44 +00:00
Wesley Peck
3d820baf19 Add scheduling information for the MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129311 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 22:31:52 +00:00
Rafael Espindola
a61842bf6e Implement cfi_rel_offset 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129306 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 21:49:50 +00:00
Rafael Espindola
787d41aaa0 Add test for previous commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129304 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 21:41:34 +00:00
Johnny Chen
35563fee7b Fix the bug where the immediate shift amount for Thumb logical shift instructions are incorrectly disassembled. 
rdar://problem/9266265


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129298 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 21:14:35 +00:00
Evan Cheng
d67705faaa Look pass copies when determining whether hoisting would end up inserting more copies. rdar://9266679 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 21:09:18 +00:00
Johnny Chen
e679d3331b Check invalid register encodings for LdFrm/StFrm ARM instructions and flag them as 
invalid instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 18:34:12 +00:00
Bill Wendling
5d7a5a4f53 Revert r129235 pending a vetting of the EH rewrite. 
--- Reverse-merging r129235 into '.':
D    test/Feature/bb_attrs.ll
U    include/llvm/BasicBlock.h
U    include/llvm/Bitcode/LLVMBitCodes.h
U    lib/VMCore/AsmWriter.cpp
U    lib/VMCore/BasicBlock.cpp
U    lib/AsmParser/LLParser.cpp
U    lib/AsmParser/LLLexer.cpp
U    lib/AsmParser/LLToken.h
U    lib/Bitcode/Reader/BitcodeReader.cpp
U    lib/Bitcode/Writer/BitcodeWriter.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-10 23:18:04 +00:00
Bill Wendling
d7bb295d22 Beginning of the Great Exception Handling Rewrite. 
* Add a "landing pad" attribute to the BasicBlock.
* Modify the bitcode reader and writer to handle said attribute.

Later: The verifier will ensure that the landing pad attribute is used in the
appropriate manner. I.e., not applied to the entry block, and applied only to
basic blocks that are branched to via a `dispatch' instruction.

(This is a work-in-progress.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129235 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-10 00:04:27 +00:00
Chris Lattner
15f8951799 fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, 
InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 19:41:05 +00:00
Chris Lattner
008c93e884 look for the verboten argument slot access in any order, thanks to Frits 
for pointing this out


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 17:00:34 +00:00
Benjamin Kramer
c18214a6e0 Don't store Twine temporaries, it's not safe. 
And don't append the name over and over again in the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129210 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 11:26:27 +00:00
Eli Friedman
18a2e50a9b Add back a couple checks removed by r129128; the fact that an intitializer 
is an array of structures doesn't imply it's a ConstantArray of
ConstantStruct.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129207 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 09:11:09 +00:00
Chris Lattner
f5bf464b70 fix PR9523, a crash in looprotate on a non-canonical loop made out of indirectbr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 07:25:58 +00:00
Chris Lattner
0403b473dd Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could 
delete the instruction pointed to by CGP's current instruction
iterator, leading to a crash on the testcase.  This fixes PR9578.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 07:05:44 +00:00
Eli Friedman
9055ccdb6b PR9604; try to deal with RAUW updates correctly in the AST. I'm not convinced 
it's completely safe to cache the AST across LICM runs even with this fix,
but this fix can't hurt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129198 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 06:55:46 +00:00
Eli Friedman
83d13a046f Test for r129190. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129197 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 06:39:43 +00:00
Chris Lattner
b99e000d79 fix two completely broken tests, which were matching due to PR9629. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129195 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 06:34:38 +00:00
Chris Lattner
9f264597d8 remove a bunch of CHECK lines that aren't checking what 
they thought they were, because alternation was expanding
wrong in {{}}'s.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 06:31:06 +00:00
Chris Lattner
b3452ea35c have dag combine zap "store undef", which can be formed during call lowering 
with undef arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129185 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 02:32:02 +00:00
Chris Lattner
4ae6a4d696 don't test for codegen of 'store undef' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 02:31:26 +00:00
Devang Patel
f03a3383f9 Add radar number for future reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129172 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 23:52:04 +00:00
Devang Patel
fb6e8d6554 Do not emit DW_AT_upper_bound and DW_AT_lower_bound for unbouded array. 
If lower bound is more then upper bound then consider it is an unbounded array.
An array is unbounded if non-zero lower bound is same as upper bound.
If lower bound and upper bound are zero than array has one element.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:55:10 +00:00
Evan Cheng
4da0c7c0c9 Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129152 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:37:21 +00:00
Johnny Chen
c636074afc Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. 
PR9650
rdar://problem/9257565


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129147 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 19:41:22 +00:00
Johnny Chen
40de2b3f15 Sanity check the option operand for DMB/DSB. 
PR9648
rdar://problem/9257634


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129146 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 19:18:07 +00:00
Johnny Chen
084b5df5ae MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it. 
Add tests for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129137 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 17:29:58 +00:00
Johnny Chen
97fdff1d3f Add sanity checking for bad register specifier(s) for the DPFrm instructions. 
Add more test cases to exercise the logical branches related to the above change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 00:29:09 +00:00
Rafael Espindola
9974b8b3cb Update tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 23:51:25 +00:00