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d5af63f325
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3389 Commits

Author SHA1 Message Date
Chris Lattner
d5af63f325 Remove obsolete code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6518 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-02 00:09:00 +00:00
Chris Lattner
bba1b6df9a Move target specific code to target files. The new MachineCodeEmitter 
class is actually target independent!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6517 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 23:24:36 +00:00
Chris Lattner
04b0b309c4 Move X86 specific code out of the JIT into the X86 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6516 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 23:23:50 +00:00
Chris Lattner
efc84a4082 Changes to be compatible with MachineCodeEmitter.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6515 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 23:22:11 +00:00
Brian Gaeke
63b99f91c9 Fix induction variable name clash in for loops, in finishFunction(). 
Modify new MachineOperand so that its flags match the old MachineOperand's
 flags, for the flags that matter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6513 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 22:08:29 +00:00
Brian Gaeke
76e3dc798b Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed 
by a re-link of TableGen will notify Make to rebuild the .inc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6512 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 04:52:51 +00:00
Chris Lattner
26c6915539 Don't print out unique identifier for opaque types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6511 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 03:45:51 +00:00
Chris Lattner
20772547c5 * Implement cast (long|ulong) to bool 
* Fix cast of (short|ushort|int|uint) to bool to work right


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6510 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 03:38:24 +00:00
Chris Lattner
6c8125fa56 Add RR forms of test instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6509 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 03:37:46 +00:00
Chris Lattner
d13bd22fbe Fix a bug with casts to bool. This fixes testcase UnitTests/2003-05-31-CastToBool.c 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6507 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 03:36:51 +00:00
Chris Lattner
074d84c746 Implement xform: (X != 0) -> (bool)X 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6506 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 03:35:25 +00:00
Anand Shukla
55afc33882 Add map info for arguments to call (copies) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6503 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 02:48:23 +00:00
Anand Shukla
619754fb18 Added the #(internal functions) to output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6502 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 02:40:49 +00:00
Chris Lattner
9171ef5e8d Add support for shl and shr for 64 bit integer types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6499 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 01:56:54 +00:00
Chris Lattner
3f7905bdec Add definitions for TEST instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6498 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 01:56:39 +00:00
Chris Lattner
8d8e0c6e83 Add new cmovne32 instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6496 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-01 00:05:15 +00:00
Chris Lattner
a92dc19397 Fix bug: CBackend/2003-05-31-MissingStructName.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6495 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 23:30:52 +00:00
Chris Lattner
c16e631e94 Fix bug: FunctionResolve/2003-05-31-AllInternalDecls.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6486 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 21:57:06 +00:00
Chris Lattner
12ce59d3c5 Fix bug: FuncResolve/2003-05-31-InternalDecl.ll 
Count resolutions correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6482 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 21:08:45 +00:00
Chris Lattner
40c4959e9f Simplify funcresolve a bit more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6480 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 20:44:46 +00:00
Chris Lattner
567cceea49 Fix bug: FunctionResolve/2003-05-31-FuncPointerResolve.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6479 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 20:33:31 +00:00
Tanya Lattner
658c5bcdb2 Fixed comment width, changed arg to be const, fixed indentation, removed unnecessary includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6476 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 20:01:37 +00:00
Vikram S. Adve
2263df029a Renamed a variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6472 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:43:41 +00:00
Vikram S. Adve
5cdb12f958 Minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6470 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:41:54 +00:00
Vikram S. Adve
f3d3ca18b5 Added MachineCodeForInstruction object as an argument to 
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6469 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:41:24 +00:00
Vikram S. Adve
3497782f38 Allow explicit physical registers for implicit operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6468 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:39:06 +00:00
Vikram S. Adve
7952d6088e Changes to allow explicit physical register arguments that have been 
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6467 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:37:05 +00:00
Vikram S. Adve
9635867d6f Several bug fixes: globals in call operands were not being pulled out; 
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6466 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:34:57 +00:00
Vikram S. Adve
d0d06ad4f3 Extensive changes to the way code generation occurs for function 
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:32:01 +00:00
Vikram S. Adve
af9fd51da2 Reverting previous beautification changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6464 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 07:27:17 +00:00
Misha Brukman
f86d635e20 Fixed rewriting of branches -- they now work forward and backward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6463 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:26:48 +00:00
Misha Brukman
dcbe712841 Removed useless code -- the byte order of output code is correct as is. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:26:06 +00:00
Misha Brukman
33cc12319c The 'rd' register is consistently mentioned last in instruction definitions. 
Created new classes from which instructions inherit their ordering of fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6461 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:25:19 +00:00
Misha Brukman
286903909f * Put back into action SLL/SRL/SRA{r,i}6 instructions 
* Fixed page numbers referring to the Sparc manual


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6460 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:24:29 +00:00
Misha Brukman
b3fabe0c83 Code beautification, no functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6459 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:22:37 +00:00
Misha Brukman
b17343d81e Enabling some of these passes causes lli to break 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6457 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 04:23:04 +00:00
Misha Brukman
c89d256e95 The actual order of parameters in a 2-reg-immediate assembly instructions is 
"rs1, imm, rd": most importantly, rd goes last.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6456 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 04:22:26 +00:00
Misha Brukman
417a7c06e8 Since malloc is no longer used, no need to free() memory. 
Fixed BasicBlock patching by supplying correct type for the displacement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6453 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:39:37 +00:00
Misha Brukman
88ba25444c When converting virtual registers to immediate constants, change the opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6452 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:36:27 +00:00
Misha Brukman
da3a8b19ce Added saveBBreferences() for BasicBlock resolution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6451 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:32:45 +00:00
Misha Brukman
a9f7f6e25d Added: 
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6449 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:17:33 +00:00
Misha Brukman
f3453d1695 Fixed the namespace to match SparcInternals.h; added notes on some missing 
sections of instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6448 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:15:59 +00:00
Misha Brukman
d3d97be4d1 The register types need to be visible outside of the class to be useful. 
For one, converting register numbers based on class in the code emitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6447 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:12:42 +00:00
Misha Brukman
7b647942ef Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes. 
Code beautification for the rest of the code: changed layout to match the rest
of the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6446 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:11:56 +00:00
Misha Brukman
d1ef7a816e Make LLI behave just like LLC with regard to the compile passes it uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6444 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:00:13 +00:00
Chris Lattner
b37923f9a1 Okay totally give up on trying to optimize aggregates that cannot be completely 
broken up into their elements.  Too many programs break because of this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6440 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 19:22:14 +00:00
Misha Brukman
ed36fd8da6 Made the register and immediate versions of instructions consecutive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6439 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 19:14:01 +00:00
Chris Lattner
26d2ca1d13 add a check that allows the SRoA pass to avoid breaking programs, even if their 
behavior is technically undefined


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6438 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 18:09:57 +00:00
Misha Brukman
9b03633265 Because the format of the shift instructions is `shift r, shcnt, r', the 
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.

Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.

The other changes are just elimination of unnecessary spaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6437 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 18:06:10 +00:00
Tanya Lattner
6074d2f37a Added the CloneTrace function which clones traces. It takes a vector of basic blocks, removes 
internal phi nodes, and returns a new vector of basic blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6431 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 15:50:18 +00:00