Eric Christopher
d84aa00c7c
FileCheck-ize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:13:58 +00:00
Eric Christopher
5211876288
FileCheck-ize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:13:55 +00:00
Craig Topper
0b9c5e268f
Add hasSideEffects=0 to CMP*rr_REV.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:08:46 +00:00
Nadav Rotem
d92ee757c3
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171129 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:04:12 +00:00
Craig Topper
5e6a86c7f0
Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions. Shouldn't change any functionality since they don't have patterns to select them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 02:01:33 +00:00
Eric Christopher
32b3768ec1
Right now all of the relocations are 32-bit dwarf, and the relocation
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information doesn't return an addend for Rel relocations. Go ahead
and use this information to fix relocation handling inside dwarfdump
for 32-bit ELF REL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 01:07:07 +00:00
Nadav Rotem
5dd839430c
If all of the write objects are identified then we can vectorize the loop even if the read objects are unidentified.
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PR14719.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:30:53 +00:00
Craig Topper
e9fd6ad567
Fix operands and encoding form for ARPL instruction. Register form had and reversed. Memory form writes memory, but was marked as MRMSrcMem.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:27:57 +00:00
Craig Topper
ee5b63cb52
Add hasSideEffects=0 to some atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 23:08:12 +00:00
Craig Topper
b87a5b3a1f
Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:19:23 +00:00
Nick Lewycky
dbf5081a31
80 columns. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:00:49 +00:00
Nick Lewycky
1dec62ed43
Remove mid-optimizer warning. This situation should be handled differently,
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such as by a compiler warning, a check in clang -fsanitizer=undefined, being
optimized to unreachable, or a combination of the above. PR14722.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 22:00:35 +00:00
Craig Topper
37cb8398c8
Mark all the _REV instructions as not having side effects. They aren't really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:30:22 +00:00
Craig Topper
a85cbfeba7
Remove a special conditional setting of neverHasSideEffects if the instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:04:30 +00:00
Nadav Rotem
8c6cb31f6e
Update the docs with the new workload that was added.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171115 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 19:45:00 +00:00
Nadav Rotem
13eb1e7817
LoopVectorizer: Optimize the vectorization of consecutive memory access when the iteration step is -1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 19:08:17 +00:00
Eli Bendersky
f1a26cf9df
Fix comment typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 18:15:42 +00:00
Evgeniy Stepanov
b53be53c72
[msan] Raise alignment of origin stores/loads when possible.
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Origin alignment is as high as the alignment of the corresponding application
location, but never less than 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 11:55:09 +00:00
Evgeniy Stepanov
ab29644a33
[msan] Expand the file comment with track-origins info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 10:59:00 +00:00
Benjamin Kramer
23c5021f42
Fix quoting in configure. Patch by Krzysztof Parzyszek!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 10:48:49 +00:00
Craig Topper
0a5ead92ff
Merge still more SSE/AVX instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 07:54:43 +00:00
Craig Topper
07555fc640
Merge more SSE/AVX instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 07:20:35 +00:00
NAKAMURA Takumi
fc093def2d
TableGen/FixedLenDecoderEmitter.cpp: Fix a potential mask overflow in fieldFromInstruction().
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Reported by Yang Yongyong, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:43:14 +00:00
Nadav Rotem
00ba3014d8
revert an accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:16:03 +00:00
Craig Topper
755841d9d7
Fix 80 column violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:15:53 +00:00
Craig Topper
6f9d44e072
Fix class name in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:15:09 +00:00
Craig Topper
219bc2db1f
Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:14:15 +00:00
Nadav Rotem
f7769e3c2f
Doc: add fmuladd to the list of vectorizeable functions. Thanks hfinkel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:03:35 +00:00
Craig Topper
02082efaab
Remove 'v' from mnemonic to fix asm matching failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:02:15 +00:00
Craig Topper
3cdc3827ce
Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for a bunch of SSE2 integer arithmetic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 05:49:15 +00:00
Nadav Rotem
a05f7cbbde
Reformat the docs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 04:59:20 +00:00
Nadav Rotem
4595528781
white space
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 04:58:12 +00:00
Craig Topper
09a326d3f0
Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for PAND/POR/PXOR/PANDN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 04:36:03 +00:00
Craig Topper
1fe132ae7d
Merge an AVX/SSE 256-bit and 128-bit multiclass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 03:56:47 +00:00
Craig Topper
b5c590a586
Mark VANDNPD/VANDNPDS as not commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 03:48:10 +00:00
NAKAMURA Takumi
b1a3bafbf1
llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 03:19:30 +00:00
NAKAMURA Takumi
05c8fd9ee2
llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 03:08:55 +00:00
Craig Topper
174a3d3e63
Remove alignment from a bunch more VEX encoded operations in the folding tables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 02:44:47 +00:00
Craig Topper
d83a73adf0
Remove alignment from folding table for VMOVUPD as an unaligned instruction it shouldn't require alignment...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 02:14:19 +00:00
Craig Topper
1ac0046fa8
Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit stores which aren't required to be aligned on SSE or AVX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 01:47:12 +00:00
Hal Finkel
a777284158
BBVectorize: Use VTTI to compute costs for intrinsics vectorization
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For the time being this includes only some dummy test cases. Once the
generic implementation of the intrinsics cost function does something other
than assuming scalarization in all cases, or some target specializes the
interface, some real test cases can be added.
Also, for consistency, I changed the type of IID from unsigned to Intrinsic::ID
in a few other places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 01:36:57 +00:00
Craig Topper
0f77910e6f
Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171049. This instruction doesn't require alignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 00:35:47 +00:00
Hal Finkel
1d59f5fa53
LoopVectorize: Enable vectorization of the fmuladd intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 23:21:29 +00:00
Hal Finkel
64a7a24edf
BBVectorize: Enable vectorization of the fmuladd intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 22:36:08 +00:00
Hal Finkel
abdf75511b
Loosen scheduling restrictions on the PPC dcbt intrinsic
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As with the prefetch intrinsic to which it maps, simply have dcbt
marked as reading from and writing to its arguments instead of having
unmodeled side effects. While this might cause unwanted code motion
(because aliasing checks don't really capture cache-line sharing),
it is more important that prefetches in unrolled loops don't block
the scheduler from rearranging the unrolled loop body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 18:51:18 +00:00
Hal Finkel
cd9ea51986
Expand PPC64 atomic load and store
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Use of store or load with the atomic specifier on 64-bit types would
cause instruction-selection failures. As with the 32-bit case, these
can use the default expansion in terms of cmp-and-swap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 17:22:53 +00:00
Evgeniy Stepanov
59a65f7b24
[msan] Fix handling of vectors of pointers.
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VectorType::getInteger() can not be used with them, because pointer size
depends on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 16:04:38 +00:00
Evgeniy Stepanov
6607716368
[msan] Fix handling of select with vector condition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 14:56:21 +00:00
Benjamin Kramer
50ec431c9f
Harden test so it's not affected by changes to compare lowering.
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This only failed on hosts that don't have SSE41.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 13:23:23 +00:00
Benjamin Kramer
99f78061e0
X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 13:09:08 +00:00