Chris Lattner
dfdd6c5d7a
minor microoptimizations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 21:56:24 +00:00
Chris Lattner
eebac5fee6
Use a map to cache the ModuleType information, so we can do logarithmic
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lookups instead of linear time lookups. This speeds up bc parsing of a
large file from
137.834u 118.256s 4:27.96
to
132.611u 114.436s 4:08.53
with a release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 21:26:53 +00:00
Jim Laskey
8ba732bb1c
Refactor gathering node info and emission.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23610 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 12:30:32 +00:00
Chris Lattner
6db0756f02
clean up this code a bit, no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 07:22:07 +00:00
Chris Lattner
8ca02914e5
Speed up the asm printer a lot by not printing formatted LLVM asm output
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for globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23608 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 07:08:36 +00:00
Chris Lattner
53a79aaae9
Break the body of the loop out into a new method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23606 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 04:47:08 +00:00
Chris Lattner
a385bf7b6d
Fix case of path
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23605 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 03:32:39 +00:00
Chris Lattner
5e8ca66914
Make IVUseShouldUsePostIncValue more aggressive when the use is a PHI. In
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particular, it should realize that phi's use their values in the pred block
not the phi block itself. This change turns our em3d loop from this:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r2, 0
b LBB_test_6 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
or r2, r6, r6
lwz r6, 0(r3)
cmpw cr0, r6, r5
beq cr0, LBB_test_6 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r2, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; endif.loopexit.loopexit_crit_edge
addi r3, r2, 1
blr
LBB_test_6: ; loopexit
or r3, r2, r2
blr
into:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r2, 0
b LBB_test_5 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
or r2, r6, r6
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
or r2, r6, r6
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; loopexit
or r3, r2, r2
blr
Unfortunately, this is actually worse code, because the register coallescer
is getting confused somehow. If it were doing its job right, it could turn the
code into this:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r6, 0
b LBB_test_5 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; loopexit
or r3, r6, r6
blr
... which I'll work on next. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23604 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 02:50:05 +00:00
Chris Lattner
0ae33eb243
Refactor some code into a function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23603 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 01:04:44 +00:00
Chris Lattner
1902ff4d82
This break is bogus and I have no idea why it was there. Basically it prevents
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memoizing code when IV's are used by phinodes outside of loops. In a simple
example, we were getting this code before (note that r6 and r7 are isomorphic
IV's):
li r6, 0
or r7, r6, r6
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
or r2, r7, r7
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r2, r7, 1
addi r7, r7, 1
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
Now we get:
li r6, 0
LBB_test_3: ; no_exit
or r2, r6, r6
lwz r6, 0(r3)
cmpw cr0, r6, r5
beq cr0, LBB_test_6 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r2, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
this was noticed in em3d.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23602 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 00:37:33 +00:00
Chris Lattner
37edbf0b21
when checking if we should move a split edge block outside of a loop,
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check the presplit pred, not the post-split pred. This was causing us
to make the wrong decision in some cases, leaving the critical edge block
in the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23601 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 00:31:52 +00:00
Chris Lattner
9390368970
This member can be const too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23600 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 00:21:25 +00:00
Chris Lattner
80bec12f96
put the right labels on the data
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 21:51:38 +00:00
Chris Lattner
ab510a76d6
Fix a problem where the legalizer would run out of stack space on extremely
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large basic blocks because it was purely recursive. This switches it to an
iterative/recursive hybrid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23596 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 17:49:46 +00:00
Chris Lattner
dcd5abc70c
silence a bogus warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:30:51 +00:00
Chris Lattner
3cf8760dc5
silence some warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:29:36 +00:00
Chris Lattner
123557fcf0
silence a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23593 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:27:59 +00:00
Chris Lattner
dff06f4348
add patterns for float binops and fma ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:46:28 +00:00
Chris Lattner
080a4b1637
Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
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compile with an assertion that the tables are not sorted!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:13:52 +00:00
Chris Lattner
a3638c0f1f
Add assertions to the trivial scheduler to check that the value types match
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up between defs and uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:10:55 +00:00
Chris Lattner
43f07a4bbc
another solution to the fsel issue. Instead of having 4 variants, just force
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the comparison to be 64-bits. This is fine because extensions from float
to double are free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7
fsel can take a different FP type for the comparison and for the result. As such
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split the FSEL family into 4 things instead of just two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21
fix an f32/f64 type mismatch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:37:13 +00:00
Chris Lattner
14765be0bc
Codegen CopyFromReg using the regclass that matches the valuetype of the
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destination vreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:34:16 +00:00
Chris Lattner
a916dd8888
Adjust to change in ctor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:51 +00:00
Chris Lattner
4b2e5a680f
Emit the value type for each register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23584 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:37 +00:00
Chris Lattner
4c225baa3e
Expose the actual valuetype of each register class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23583 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:19 +00:00
Chris Lattner
ca0a4778a8
Minor tweak to the branch selector. When emitting a two-way branch, and if
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we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch. For example, emit this:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
ble cr0, LBBl29_z__44
b LBBl29_z__48 *** NOT PART OF LOOP
Instead of:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
bgt cr0, LBBl29_z__48 *** PART OF LOOP!
b LBBl29_z__44
The former sequence has one fewer dispatch group for the loop body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8
like the comment says, enable this
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:02:40 +00:00
Chris Lattner
505277a7f5
Add some very paranoid checking for operand/result reg class matchup
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For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23580 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 07:45:09 +00:00
Jeff Cohen
2aeaf4e839
Fix VC++ warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23579 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 03:57:14 +00:00
Chris Lattner
2c1760f636
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4
Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
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These are used to represent float and double values, and the two regclasses
contain the same physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Chris Lattner
f85a55b096
Annotate nodes with their addresses if a graph requests it.
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This is Jim's feature implemented so that graphs could 'opt-in' and get
this behavior. This is currently used by selection dags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23576 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 00:19:21 +00:00
Chris Lattner
37345fe3cd
add a method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23575 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 00:17:07 +00:00
Jim Laskey
22f6212e9f
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23574 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 00:08:23 +00:00
Jim Laskey
41755e2c7e
1. Simplify the gathering of node groups.
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2. Printing node groups when displaying nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23573 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 00:03:07 +00:00
Jim Laskey
242f2557cc
Should be using flag and not chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e
Remove some now-dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 21:28:27 +00:00
Andrew Lenharth
542f2df2fa
more specific tests of subtarget stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23570 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 20:30:24 +00:00
Andrew Lenharth
ac35cd207f
subtarget support for CIX and FIX extentions (the only 2 I care about right now)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23569 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 20:24:38 +00:00
Jim Laskey
b78ea801cd
Reverting change moving to selection dag graph.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23568 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 19:33:41 +00:00
Jim Laskey
453d21e66c
Added allnodes_size for scheduling support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23567 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 19:27:01 +00:00
Jim Laskey
b6d4c2cf2d
1. Made things node-centric (from operand).
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2. Added node groups to handle flagged nodes.
3. Started weaning simple scheduling off existing emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 19:15:27 +00:00
Jim Laskey
e6e34bc07c
Add the node name (thus the address) to node label.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23565 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 19:11:53 +00:00
Chris Lattner
0f21fd5204
Rename MRegisterDesc -> TargetRegisterDesc for consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:49:27 +00:00
Chris Lattner
88a06d2e3e
Update the discussion of TargetRegisterDesc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:46:55 +00:00
Chris Lattner
22842105de
remove some more initializers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:41:05 +00:00
Chris Lattner
863914feb5
trim down the target info structs now that we have a preferred spill register class for each callee save register
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Why is V9 maintaining these tables manually? ugh!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:38:36 +00:00
Chris Lattner
2f02ed9a1f
trim down the target info structs now that we have a preferred spill register class for each callee save register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:35:22 +00:00