Commit Graph

52321 Commits

Author SHA1 Message Date
Jim Grosbach
e0934bee3a Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:58 +00:00
Jim Grosbach
020f4e861a ExecutionEngine interface to re-map addresses for engines that support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:55 +00:00
Jim Grosbach
652ca2fe0c MCJIT handle a few more simple x86 relocations for MachO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:49 +00:00
David Blaikie
2dd674fdce Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.
(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:24:27 +00:00
Hal Finkel
17d2dbd5f9 Cleanup PPC RLWINM8 vs RLWINM
No test case: output assembly will be identical.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:22:50 +00:00
Hal Finkel
504d1d2fa4 AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:53:41 +00:00
Jakob Stoklund Olesen
c035c940a6 Extract method for detecting constant unallocatable physregs.
It is safe to move uses of such registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:34:08 +00:00
Jim Grosbach
61425c0a7f MCJIT support for non-function sections.
Move to a by-section allocation and relocation scheme. This allows
better support for sections which do not contain externally visible
symbols.

Flesh out the relocation address vs. local storage address separation a
bit more as well. Remote process JITs use this to tell the relocation
resolution code where the code will live when it executes.

The startFunctionBody/endFunctionBody interfaces to the JIT and the
memory manager are deprecated. They'll stick around for as long as the
old JIT does, but the MCJIT doesn't use them anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:26:39 +00:00
Stepan Dyatkovskiy
27bf56056b Fixed comment in loop-unswitch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 20:48:04 +00:00
Jakob Stoklund Olesen
63c6672423 Give better scavenger errors by invoking the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 20:38:31 +00:00
Jakob Stoklund Olesen
7739cad69d Add a new kind of MachineOperand: MO_RegisterMask.
Register masks will be used as a compact representation of large clobber
lists.  Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers.  That's more than 1kB of useless
operands per call site.

A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered.  The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().

By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.

This patch introduces the new operand kind.  Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 19:22:00 +00:00
Eli Friedman
1857b51ef5 Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 16:42:21 +00:00
Eli Friedman
a20b71518a Get rid of unused codegen-only instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 16:29:35 +00:00
Craig Topper
b7ab7fe053 Give priority to AVX over SSE for 128-bit floating point unpck instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 09:56:42 +00:00
Eli Bendersky
9223822b85 A fix for the previous commit: "integer constant is too large for ‘long’ type" error on some 32-bit bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 09:31:10 +00:00
Eli Bendersky
a66a18505e Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is currently basic and will be enhanced with future patches.
Patch developed by Andy Kaylor and Daniel Malea. Reviewed on llvm-commits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148231 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 08:56:09 +00:00
David Blaikie
810d6d3354 Refactor variables unused under non-assert builds (& remove two entirely unused variables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 05:17:39 +00:00
Pete Cooper
bf42139989 Changed intrinsic ID operand to a target constant as its not used in any arithmetic so should not be checked in legalisation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 04:08:12 +00:00
Nadav Rotem
cc6165695f [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 19:27:55 +00:00
Benjamin Kramer
ed4c8c633c Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 13:16:05 +00:00
Benjamin Kramer
ae4746b29a DAGCombiner: Deduplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 11:50:43 +00:00
Stepan Dyatkovskiy
0499c1fd8f Cosmetic patch for r148215.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148216 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 09:45:11 +00:00
Stepan Dyatkovskiy
209287d225 Fixup for r148132. Type replacement for LoopsProperties: from DenseMap to std::map, since we need to keep a valid pointer to properties of current loop.
Message for r148132:
LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 09:44:07 +00:00
Chandler Carruth
4aab4ab340 Remove SetWorkingDirectory from the Process interface. Nothing in LLVM
or Clang is using this, and it would be hard to use it correctly given
the thread hostility of the function. Also, it never checked the return
which is rather dangerous with chdir. If someone was in fact using this,
please let me know, as well as what the usecase actually is so that
I can add it back and make it more correct and secure to use. (That
said, it's never going to be "safe" per-se, but we could at least
document the risks...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148211 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 08:41:35 +00:00
David Blaikie
49c0a9ac98 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148206 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 01:09:13 +00:00
Craig Topper
799ea5ccc0 Truncate of undef is just undef of smaller size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-15 01:05:11 +00:00
Craig Topper
d07ef50ca1 Fix the memop type on a couple 256-bit AVX instructions that were using f128mem instead of f256mem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 18:29:57 +00:00
Craig Topper
446626d236 Add a bunch of AVX instructions to the folding tables. Also fixed the alignment on 256-bit AVX2 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 18:14:53 +00:00
Duncan Sands
c464e998e6 Speculatively revert commit 148175 (rafael), to see if this fixes
non-determinism in the 32 bit dragonegg buildbot.  Original commit
message:
Only emit the Leh_func_endN symbol when needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 17:16:48 +00:00
Andrew Trick
dd1f22f25d Fix a corner case hit by redundant phi elimination running after LSR.
Fixes PR11761: bad IR w/ redundant Phi elim


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 03:17:23 +00:00
Rafael Espindola
da22344804 Only emit the Leh_func_endN symbol when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:36:51 +00:00
Andrew Trick
3c58ba8ea7 misched: Initial code for building an MI level scheduling DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:18 +00:00
Andrew Trick
7ebcaf4cf9 Move physreg dependency generation into aptly named addPhysRegDeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:15 +00:00
Andrew Trick
5e920d7c83 misched: Added ScheduleDAGInstrs::IsPostRA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:12 +00:00
Andrew Trick
e9ef4ed13b misched: Invoke the DAG builder on each sequence of schedulable instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:09 +00:00
Andrew Trick
5edf2f03d5 Move things around to make the file navigable, even though it will probably be split up later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 02:17:06 +00:00
Evan Cheng
bfe8afaaec After r147827 and r147902, it's now possible for unallocatable registers to be
live across BBs before register allocation. This miscompiled 197.parser
when a cmp + b are optimized to a cbnz instruction even though the CPSR def
is live-in a successor.
        cbnz    r6, LBB89_12
...
LBB89_12:
        ble     LBB89_1

The fix consists of two parts. 1) Teach LiveVariables that some unallocatable
registers might be liveouts so don't mark their last use as kill if they are.
2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional
branch does not kill CPSR.

rdar://10676853


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 01:53:46 +00:00
Chad Rosier
d32d3b758f Fix pasto from r146196.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 01:50:21 +00:00
Dan Gohman
92180988a4 Fix an unused variable warning that Chad noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 00:47:44 +00:00
Rafael Espindola
54f7533e36 Remove previous commit while I debug the bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 23:28:50 +00:00
Jakob Stoklund Olesen
ece8b73eb2 Use RegisterTuples to generate pseudo-registers.
The QQ and QQQQ registers are not 'real', they are pseudo-registers used
to model some vld and vst instructions.

This makes the call clobber lists longer, but I intend to get rid of
those soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:55:42 +00:00
Rafael Espindola
cf05d03961 Remove label that is not used anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:41:58 +00:00
Eli Friedman
09a536a88b Speculatively revert r148132+r148133 to try and fix a buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:34:39 +00:00
Andrew Trick
23d1c5ce8a Remove pointless mode line in .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:04:16 +00:00
Devang Patel
85d5aaecd0 Revert r148131, it was committed before it was ready.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:28:58 +00:00
Stepan Dyatkovskiy
5dab2bf293 Cosmetic patch for r148132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:27:22 +00:00
Stepan Dyatkovskiy
a5a1e46d00 LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:13:54 +00:00
Devang Patel
c798cc4283 Refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:12:18 +00:00
Craig Topper
0518970dc8 Convert SHUFPD with the same register for both sources to PSHUFD if it would prevent a register copy. Similar to SHUFPS, but requires the mask to be converted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 09:21:41 +00:00
Craig Topper
562659ff6b use v8i32 as optimal mem type over v8f32 if AVX2 is enabled. Similar to SSE2 vs SSE1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 08:32:21 +00:00