a3f99f9033
First patch in the direction of splitting MachineCodeEmitter in two subclasses:
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JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-30 20:51:52 +00:00
2265ba0717
The MONITOR and MWAIT instructions have insufficient information for
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decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.
Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 23:40:46 +00:00
6ed34918eb
Avoid unneeded SIB byte encoding. Patch by Zoltan Varga.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 00:07:35 +00:00
43e91b9c2f
Use X86AddrNumOperands instead of magic constant one
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more place. This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645. At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71106 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 19:04:30 +00:00
ef1840173c
Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 18:18:57 +00:00
b0030ddca4
- Avoid the longer SIB encoding on x86_64 when it's not needed.
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- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 22:49:16 +00:00
094fad37b9
Re-apply 68552.
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Tested by bootstrapping llvm-gcc and using that to build llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 21:14:34 +00:00
044b5344c4
Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
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builds.
--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 22:35:25 +00:00
2a6411bbbd
Reduce code duplication on the TLS implementation.
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This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.
Will work on it and on X86-64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 21:37:46 +00:00
da945e3bb2
Have only one definition of X86AddrNumOperands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 18:55:31 +00:00
b449a68146
Make code a bit less brittle by no hardcoding the number
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of operands in an address in so many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 17:03:24 +00:00
a065200eaf
Re-apply 66024 with fixes: 1. Fixed indirect call to immediate address assembly. 2. Fixed JIT encoding by making the address pc-relative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 18:15:39 +00:00
5788d1a169
Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 02:32:19 +00:00
eda60a8364
Eliminate a compile time warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 23:21:11 +00:00
f4b24e2b66
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59004 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 22:09:58 +00:00
9ed2f80910
Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58949 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 01:08:07 +00:00
c96a8e7df1
Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
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indirect gv reference. Please don't call it lazy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 01:50:32 +00:00
fd532d7cd9
x86_64 rip-relative and magic mode address
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:13:42 +00:00
b74f370e43
Generate code for TLS instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 15:22:06 +00:00
c9f3cc3bda
Fix constant-offset emission for x86-64 absolute addresses. This
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fixes a bunch of test-suite JIT failures on x86-64 in
-relocation-model=static mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 01:57:54 +00:00
4b299d4ebd
Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions except they do not have any operands. The RegModRM byte is encoded with register number 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:14:20 +00:00
d21a6305ea
Update size of inst correctly with segment override.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-12 10:30:11 +00:00
a4bb48adc3
Fix comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:34:24 +00:00
ef93cecd80
Add ability to override segment (mostly for code emitter purposes).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:09:15 +00:00
d735b8019b
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 15:45:36 +00:00
ae73dc1448
Tidy up several unbeseeming casts from pointer to intptr_t.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 17:05:41 +00:00
62990bafa3
Allow inline asm nodes with empty bodies inside JIT.
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This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:33:01 +00:00
3b32a23a90
Clean up whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 08:38:54 +00:00
5f777192a0
Make x86-64 JIT changes Darwin-specific.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 21:02:08 +00:00
ec867a22b3
In the absence of a linker to build the GOT, use the 32-bit
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non_lazy_ptr mechanism on x86-64 Darwin JIT. Fixes a bunch
of last night's failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 18:23:48 +00:00
50dd1d0280
Some fixes for x86-64 JIT. Make it use small code
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model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 23:46:25 +00:00
4406604047
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 00:05:16 +00:00
a125e62117
runOnMachineFunction should set IsPIC because relocation model may have been changed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 01:56:59 +00:00
c9f5f3f64f
Change target-specific classes to use more precise static types.
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This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 01:58:56 +00:00
7e03280b53
- Fix atomic operation JIT encoding.
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- Remove unused instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49921 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-18 20:55:36 +00:00
52e724ad7e
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-16 20:10:13 +00:00
ab394bdcc0
Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03 08:53:17 +00:00
d183307639
Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48447 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-17 06:56:52 +00:00
da47e6e0d0
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
17ed8fa63d
Add debugging stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 07:13:42 +00:00
b7664c6173
Ignore debugging related instructions if they get this far.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47934 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 02:34:36 +00:00
0b21390a86
Rather than asserting. Dump out the MI that we are not able to encode and abort.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47933 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 02:08:03 +00:00
ea7da50e5a
Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47795 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-01 13:37:02 +00:00
85db3a96b4
De-tabify
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47600 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 10:57:23 +00:00
afe6c2b001
Enable exception handling int JIT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47079 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 18:39:37 +00:00
60783304f6
Avoid needlessly casting away const qualifiers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 03:29:40 +00:00
b38bec222c
IMPLICIT_USE and IMPLICIT_DEF are dead, remove them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 19:27:54 +00:00
749c6f6b5e
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 07:27:27 +00:00
8f707e15fb
rename hasVariableOperands() -> isVariadic(). Add some comments.
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Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 05:19:29 +00:00
349c495200
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 03:13:06 +00:00
