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15347 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
e29f37f6a1 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 21:37:59 +00:00
Nate Begeman
c8ea673bc0 Fix a couple issues with Win64 ABI 
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109035 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 20:49:52 +00:00
Bruno Cardoso Lopes
928fc3b4a0 Avoid AVX instructions to be selected instead of its SSE form 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109032 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 20:38:42 +00:00
Rafael Espindola
bc56501435 Fix calling convention on ARM if vfp2+ is enabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 11:38:30 +00:00
Eric Christopher
dab4dac2a0 Pulling out previous patch, must've run the tests in 
the wrong directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 09:23:56 +00:00
Eric Christopher
87f41370a8 Lower MEMBARRIER on x86 and support processors without SSE2. 
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109004 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 09:05:23 +00:00
Bruno Cardoso Lopes
cf6ca03128 Add AVX only vzeroall and vzeroupper instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 08:56:24 +00:00
Evan Cheng
4f6b4674be Teach bottom up pre-ra scheduler to track register pressure. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 06:09:07 +00:00
Bruno Cardoso Lopes
7d7d15a159 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
4b13f3cf3d Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
1154f426d7 Add new AVX vextractf128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 23:19:02 +00:00
Chris Lattner
6e8154354f make asmprinter optional, even though passing in null will cause things to explode right now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:45:33 +00:00
Chris Lattner
cb63ecba31 continue pushing dependencies around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:35:40 +00:00
Chris Lattner
c0115b5ca1 reduce X86MCInstLower dependencies on asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:30:53 +00:00
Chris Lattner
0c13cf36ad pass around MF, not MMI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:26:07 +00:00
Chris Lattner
7648bd428b cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:23:57 +00:00
Chris Lattner
1a34c83caf move two asmprinter methods into the asmprinter .cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:18:19 +00:00
Chris Lattner
4dbbe3433f prune #includes a little. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 21:17:29 +00:00
Bruno Cardoso Lopes
e1c29be6f0 Add new AVX instruction vinsertf128 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 19:44:51 +00:00
Jim Grosbach
f084a5e81d Using BIC for immediates needs an extra bump for its complexity to get 
instruction selection to prefer it when possible. rdar://7903972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 16:07:04 +00:00
Jim Grosbach
26ede6834e Removed un-used code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108841 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 14:51:32 +00:00
Bruno Cardoso Lopes
46773793cb Fix PR7174, a couple o Mips fixes: 
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 08:37:04 +00:00
Bruno Cardoso Lopes
29e9daa750 Fix Mips PR7473. Patch by stetorvs@gmail.com 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108816 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 07:58:51 +00:00
Eric Christopher
72852a8cfb Constify some arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 06:52:21 +00:00
Bruno Cardoso Lopes
43945d99de Add AVX vbroadcast new instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:11:13 +00:00
Daniel Dunbar
7b81a0ef17 Update CMake files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108787 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:08:13 +00:00
Chris Lattner
f447a5f144 sink the arm implementations of ASmPrinter and MCInstLower 
out of the AsmPrinter directory into libarm.  Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108783 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:44:46 +00:00
Chris Lattner
aef40351f6 fix a layering problem by moving the x86 implementation 
of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory.  Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:41:57 +00:00
Bruno Cardoso Lopes
94143ee625 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:32:44 +00:00
Evan Cheng
d70f57b254 ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 22:15:08 +00:00
Daniel Dunbar
77e2dd7bb2 X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same 
instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 20:44:16 +00:00
Jim Grosbach
e1102caf86 Since ARM emits inline jump tables as part of the ConstantIsland pass, 
it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR6581.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 17:20:38 +00:00
Jim Grosbach
350afb16ec revert so I can get the right PR# in the log message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 17:19:40 +00:00
Jim Grosbach
0bb9895a78 Since ARM emits inline jump tables as part of the ConstantIsland pass, 
it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR7499.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 17:18:28 +00:00
Daniel Dunbar
926f2bb3d8 X86-64: Mark WINCALL and more tail call instructions as code gen only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 07:21:07 +00:00
Daniel Dunbar
e4c52a2c41 X86: Mark some tail call pseduo instruction as code gen only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 07:21:04 +00:00
Daniel Dunbar
df4c47be29 X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 07:21:01 +00:00
Daniel Dunbar
90b374cded MC/X86: We now match instructions like "incl %eax" correctly for the arch we are 
assembling; remove crufty custom cleanup code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 06:14:54 +00:00
Daniel Dunbar
cf246b7f0b X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 06:14:49 +00:00
Daniel Dunbar
6c2c9a27c5 X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108679 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 06:14:44 +00:00
Daniel Dunbar
54074b5f04 TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher. 
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 05:44:09 +00:00
Daniel Dunbar
d73ada7d24 Target: Give the TargetAsmParser access to the TargetMachine. 
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 00:33:49 +00:00
Chris Lattner
89a902e1c2 the stackifier is global! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 17:42:04 +00:00
Chris Lattner
a40ce7e394 doxygenify some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108625 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 17:40:51 +00:00
Jim Grosbach
5423856e44 Add combiner patterns to more effectively utilize the BFI (bitfield insert) 
instruction for non-constant operands. This includes the case referenced
in the README.txt regarding a bitfield copy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 03:30:54 +00:00
Jim Grosbach
dd7d28a17b add BFI to getTargetNodeName() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 01:50:57 +00:00
Jim Grosbach
15a2f2eff8 Fix logic think-o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 01:22:19 +00:00
Eric Christopher
697cba8ec2 Remove unnecessary check that was subsumed into canRealignStack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 00:33:04 +00:00
Eric Christopher
d4c36cec1d Make more explicit and add some currently disabled error messages for 
stack realignment on ARM.

Also check for function attributes as we do on X86 as well as
make explicit that we're checking can as well as needs in this function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 00:27:24 +00:00
Eric Christopher
acdb4b9203 Make comment a bit more clear as well as return statement since 
needsStackRealignment is currently checking the can conditions as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 00:25:41 +00:00