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e47e75b461
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3668 Commits

Author SHA1 Message Date
Evan Cheng
e47e75b461 Updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36594 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 18:42:09 +00:00
Chris Lattner
bf996f1d5e refactor GetRegistersForValue to take OpInfo as an argument instead of various 
pieces of it.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36592 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 17:29:31 +00:00
Chris Lattner
3ff90dc1c8 refactor some code, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36590 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 17:16:27 +00:00
Chris Lattner
1f6f4c7346 Clean up multi-line asam string printing. Instead of printing: 
# InlineAsm Start
        subfc r3,r5,r4
                subfze r4,r3
        # InlineAsm End

print:

        # InlineAsm Start
        subfc r3,r5,r4
        subfze r4,r3
        # InlineAsm End


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36589 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 17:00:18 +00:00
Chris Lattner
6995cf6015 generalize aggregate handling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36568 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-29 18:58:03 +00:00
Anton Korobeynikov
c6c98af9e5 Implement review feedback 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36564 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-29 18:02:48 +00:00
Chris Lattner
09e4b7e1b7 memory operands that have a direct operand should have their stores created 
before the copies into physregs are done.  This avoids having flag operands
skip the store, causing cycles in the dag at sched time.  This fixes infinite
loops on these tests:

test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36547 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 21:12:06 +00:00
Chris Lattner
c83994e5d4 eliminate more redundant constraint type analysis 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 21:03:16 +00:00
Chris Lattner
2a600be226 merge constraint type analysis stuff together. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36545 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 21:01:43 +00:00
Chris Lattner
0c58340aea Significant refactoring of the inline asm stuff, to support future changes. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36544 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 20:49:53 +00:00
Anton Korobeynikov
a80e1181b7 Implement review feedback. Aliasees can be either GlobalValue's or 
bitcasts of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 13:45:00 +00:00
Chris Lattner
44b2c5098f memory inputs to an inline asm are required to have an address available. 
If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.

This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36536 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 06:42:38 +00:00
Chris Lattner
f2f3cd5129 Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and 
CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36534 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 06:08:13 +00:00
Chris Lattner
b017318122 Fix this to match change to InlineAsm class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36524 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 04:05:59 +00:00
Chris Lattner
eb7f34f2cb Fix incorrect legalization of EHSELECTOR. This fixes 
CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36510 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 17:12:52 +00:00
Evan Cheng
4c6cfad85e Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36501 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 07:33:31 +00:00
Chris Lattner
99f9a77c49 improve EH global handling, patch by Duncan Sands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36499 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 01:20:11 +00:00
Chris Lattner
64c0f84c72 enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap 
successfully! woohoo...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36496 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 21:09:43 +00:00
Anton Korobeynikov
ab8fd40403 Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36490 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 20:44:04 +00:00
Dan Gohman
edc1d15984 Fix a typo in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36485 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 19:40:56 +00:00
Evan Cheng
faa510726f Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 19:00:32 +00:00
Evan Cheng
8e29b2192b Minor bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36473 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 08:24:22 +00:00
Evan Cheng
05350288a6 Be careful when to add implicit kill / dead operands. Don't add them during / post reg-allocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36458 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 01:40:09 +00:00
Evan Cheng
6c087e5585 Match MachineFunction::UsedPhysRegs changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 22:13:27 +00:00
Evan Cheng
505e5510a2 Change UsedPhysRegs from array bool to BitVector to save some space. Setting / getting its states now go through MachineFunction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36451 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 22:10:09 +00:00
Evan Cheng
ade31f9f07 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36449 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 21:34:08 +00:00
Evan Cheng
e96f50142e Data structure change to improve compile time (especially in debug mode). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36447 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 19:34:00 +00:00
Evan Cheng
c1a3520580 This was lefted out. Fixed sumarray-dbl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36445 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 18:33:21 +00:00
Anton Korobeynikov
8b0a8c84da Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part 
will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36435 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 14:27:10 +00:00
Evan Cheng
24a3cc4c83 Fix for PR1306. 
- A register def / use now implicitly affects sub-register liveness but does
not affect liveness information of super-registers.
- Def of a larger register (if followed by a use later) is treated as
read/mod/write of a smaller register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36434 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 07:30:23 +00:00
Evan Cheng
92efbfcd2d Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36431 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 07:18:20 +00:00
Chris Lattner
ea84c5ee95 support for >4G stack frames 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36425 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 04:30:24 +00:00
Chris Lattner
a401b1e1c5 support > 4G stack objects 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36422 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 04:20:54 +00:00
Chris Lattner
6266c18ea1 allow support for 64-bit stack objects 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36420 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 04:08:28 +00:00
Chris Lattner
964dd86054 Be more careful about folding op(x, undef) when we have vector operands. 
This fixes CodeGen/X86/2007-04-24-VectorCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 00:00:45 +00:00
Bill Wendling
95b3955034 Assertion when using a 1-element vector for an add operation. Get the 
real vector type in this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36402 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:13:23 +00:00
Scott Michel
f147a8d56e Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about 
tests always being true in the process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36387 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 01:24:20 +00:00
Dale Johannesen
00d56b96e5 modify per review commentary 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36383 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 23:33:31 +00:00
Dale Johannesen
19f5469be4 make EmitAlignment work the way Chris says it should 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36368 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 19:58:54 +00:00
Christopher Lamb
95c218a83e PR400 phase 2. Propagate attributed load/store information through DAGs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 23:15:30 +00:00
Lauro Ramos Venancio
2c5c111b6c X86 TLS: Implement review feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 20:56:26 +00:00
Reid Spencer
c67bdc288a Revert Christopher Lamb's load/store alignment changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 18:36:27 +00:00
Christopher Lamb
2330e4d4c4 add support for alignment attributes on load/store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 08:16:25 +00:00
Lauro Ramos Venancio
0d3b67809c Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36290 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 23:02:39 +00:00
Lauro Ramos Venancio
b3a0417cad Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 21:38:10 +00:00
Evan Cheng
f44c72817e VarInfo::UsedBlocks is no longer used. Remove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36250 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 05:04:38 +00:00
Chris Lattner
61a4c072b9 allow SRL to simplify its operands, as it doesn't demand all bits as input. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:06:49 +00:00
Chris Lattner
ec06e9a670 When replacing a node in SimplifyDemandedBits, if the old node used any 
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:05:22 +00:00
Chris Lattner
0a16a1f738 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:01:40 +00:00
Evan Cheng
faf05bbaea Don't populate TryAgainList when coalescing only physical registers with virtual registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36240 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 02:30:19 +00:00