Commit Graph

120020 Commits

Author SHA1 Message Date
Simon Pilgrim
e4eb76cebd [X86][SSE] Use bitmasks instead of shuffles where possible.
VPAND is a lot faster than VPSHUFB and VPBLENDVB - this patch ensures we attempt to lower to a basic bitmask before lowering to the slower byte shuffle/blend instructions.

Split off from D11518.

Differential Revision: http://reviews.llvm.org/D11541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 08:54:41 +00:00
Igor Breger
ec6000afc4 AVX512: Add encoding tests to vptestnm instructions
Differential Revision: http://reviews.llvm.org/D11521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 07:00:00 +00:00
Igor Breger
e5dac1fb56 AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11528

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:53:28 +00:00
Puyan Lotfi
fbb4b5254d Changes for MachineBasicBlock to use SortedVector for LiveIns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243389 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:38:41 +00:00
Mehdi Amini
3942a2979d Move the Target way of overriding DAG Scheduler to a target hook
Summary:
The previous way of overriding it was relying on calling "setDefault"
on the global registry, which implies global mutable state.

Reviewers: echristo, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11538

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243388 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:18:04 +00:00
Puyan Lotfi
268011e5e2 Adding ADT SortedVector; client patch will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:04:00 +00:00
Chandler Carruth
89576cea3f [GMR] Fix a long-standing bug in GlobalsModRef where it failed to clear
out the per-function modref data structures when functions were deleted
or when globals were deleted.

I don't actually know how the global deletion side of this bug hasn't
been hit before, but for the other it just-so-happens that functions
aren't likely to be deleted in the particular part of the LTO pipeline
where we currently enable GMR, so we got lucky.

With this patch, I can self-host with GMR enabled in the normal pass
pipeline!

I was a bit concerned about the compile-time impact of this chang, which
is part of what motivated my prior string of patches to make the
per-function datastructure very dense and fast to walk. With those
changes in place, I can't measure a significant compile time difference
(the difference is around 0.1% which is *way* below the noise) before
and after this patch when building a linked bitcode for all of Clang.

Differential Revision: http://reviews.llvm.org/D11453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243385 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:01:57 +00:00
Adam Nemet
bd426c622e [LDist][LVer] Explicitly pass the set of memchecks to LoopVersioning, NFC
Before the patch, the checks were generated internally in
addRuntimeCheck.  Now, we use the new overloaded version of
addRuntimeCheck that takes the ready-made set of checks as a parameter.

The checks are now generated by the client (LoopDistribution) with the
new RuntimePointerChecking::generateChecks API.

Also the new printChecks API is used to print out the checks for
debugging.

This is to continue the transition over to the new model whereby clients
will get the full set of checks from LAA, filter it and then pass it to
LoopVersioning and in turn to addRuntimeCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243382 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 05:01:53 +00:00
Craig Topper
80458cb49c Remove unnecessary const_casts. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 04:28:46 +00:00
Bob Wilson
b25dcfd104 Reserve some constant values for the Swift calling convention.
Swift has a custom calling convention that also requires some new flags
on arguments and one new attribute on alloca instructions. This patch
does not include the implementation of that calling convention - that
will be provided as part of the open-source release of Swift; this only
reserves the bitcode constant values so that they are not used for
other purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 04:05:45 +00:00
Sanjoy Das
d9408bca26 FileCheck'ify some wc/grep based tests; NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 03:50:09 +00:00
Kostya Serebryany
c830cebe1f [libFuzzer] ensure that the dfsan tracing hooks actually run (using -verbosity=3 in tests)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243365 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 01:25:00 +00:00
Kostya Serebryany
322fda4b3e [libFuzzer] when using cmp traces, first check that the CMP is evaluated to one value much more frequently than to the other value (heuristic)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243363 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 00:59:53 +00:00
Sanjay Patel
3d89ab8299 fix invalid load folding with SSE/AVX FP logical instructions (PR22371)
This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ).
I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy
when targeting 32-bit x86 and causes a miscompile/crash in Wine:
https://bugs.winehq.org/show_bug.cgi?id=38826
https://llvm.org/bugs/show_bug.cgi?id=22371#c25

The quick fix is to simply remove the scalar FP logical instructions from the load folding table
in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs,
fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP
logical instructions (because that's all x86 gives us anyway). That lets us do the load folding 
legally.

Differential Revision: http://reviews.llvm.org/D11477



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 00:48:32 +00:00
Sanjoy Das
f7681b3e3a [LSR] Move X86 specific test case to X86/
rL243348 added the test case in the wrong directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 00:13:42 +00:00
David Blaikie
04180d08db [opaque pointer type] Avoid using pointee types to retrieve InlineAsm's function type
As a stop-gap, retrieving the InlineAsm's function type was done via the
pointee type of its (pointer) Value type.

Instead, pass down and store the FunctionType in the InlineAsm object.

The only wrinkle with this is the ConstantUniqueMap, which then needs to
ferry the FunctionType down through the InlineAsmKeyType. This could be
done a bit differently if the ConstantInfo trait were broadened a bit to
provide an extension point for access to the TypeClass object from the
ValType objects, so that the ConstantUniqueMap<InlineAsm> would then be
keyed on FunctionTypes instead of PointerTypes that point to
FunctionTypes.

This drops the number of IR tests that don't roundtrip through bitcode*
without calling PointerType::getElementType from 416 to 8 (out of
10733). 3 of those crash when roundtripping at ToT anyway.

* modulo various unavoidable uses of pointer types when validating IR
  (for now) and in the way globals are parsed, unfortunately. These
  cases will either go away (because such validation will no longer be
  necessary or possible when pointee types are opaque), or have to be
  made simultaneously with the removal of pointee types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 00:06:38 +00:00
Adam Nemet
2261a25f88 [LAA] Split out a helper to print a collection of memchecks
This is effectively an NFC but we can no longer print the index of the
pointer group so instead I print its address.  This still lets us
cross-check the section that list the checks against the section that
list the groups (see how I modified the test).

E.g. before we printed this:

    Run-time memory checks:
    Check 0:
      Comparing group 0:
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
      Against group 1:
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
    ...
    Grouped accesses:
      Group 0:
        (Low: %c High: (78 + %c))
          Member: {%c,+,4}<%for.body>
          Member: {(2 + %c),+,4}<%for.body>

Now we print this (changes are underlined):

    Run-time memory checks:
    Check 0:
      Comparing group (0x7f9c6040c320):
                       ~~~~~~~~~~~~~~
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
      Against group (0x7f9c6040c358):
                     ~~~~~~~~~~~~~~
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
    ...
    Grouped accesses:
      Group 0x7f9c6040c320:
            ~~~~~~~~~~~~~~
        (Low: %c High: (78 + %c))
          Member: {(2 + %c),+,4}<%for.body>
          Member: {%c,+,4}<%for.body>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243354 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:54:41 +00:00
Sanjay Patel
13008a4188 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:43:09 +00:00
David Blaikie
4f7a4bc79f [opaque pointers] Avoid the use of pointee types when parsing inline asm in IR
When parsing calls to inline asm the pointee type (of the pointer type
representing the value type of the InlineAsm value) was used. To avoid
using it, use the ValID structure to ferry the FunctionType directly
through to the InlineAsm construction.

This is a bit of a workaround - alternatively the inline asm could
explicitly describe the type but that'd be verbose/redundant in the IR
and so long as the inline asm calls directly in the context of a call or
invoke, this should suffice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243349 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:32:19 +00:00
Sanjoy Das
477137f4d7 [LSR] Generate and use zero extends
Summary:
If a scale or a base register can be rewritten as "Zext({A,+,1})" then
LSR will now consider a formula of that form in its normal cost
computation.

Depends on D9180

Reviewers: qcolombet, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243348 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:27:51 +00:00
Sanjoy Das
fc21a10522 [TargetTransformInfo][NFCI] Add TargetTransformInfo::isZExtFree.
Summary:
This function is not used in this change but will be used in a
subsequent change.

Reviewers: mcrosier, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243347 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:27:43 +00:00
JF Bastien
7483355e34 WebAssembly: add a generic CPU
Summary: WebAssemblySubtarget.cpp expects a default 'generic' CPU to exist, and this seems to be prevalent with other targets. It makes sense to have something between MVP and bleeding-edge, even though for now it's the same as MVP. This removes a warning that's currently generated.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243345 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:25:54 +00:00
NAKAMURA Takumi
688414f251 Tweak llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll not to fail for targeting win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 23:01:41 +00:00
Alex Lorenz
01b5d5b27f MIR Serialization: Serialize the unnamed basic block references.
This commit serializes the references from the machine basic blocks to the
unnamed basic blocks.

This commit adds a new attribute to the machine basic block's YAML mapping
called 'ir-block'. This attribute contains the actual reference to the
basic block.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:42:41 +00:00
JF Bastien
3f7b911196 WebAssembly: more MCAsmInfo nits.
Summary: As suggested by sunfish.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:40:31 +00:00
Colin LeMahieu
937b1cee1a [llvm-mc] Add --no-warn flag with -W alias to disable outputting warnings while assembling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243338 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:39:14 +00:00
Reid Kleckner
ff88606563 Fix -Wmicrosoft-enum warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243337 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:35:50 +00:00
Alex Lorenz
9adb2129bd IR: Expose the method 'getLocalSlot' in the module slot tracker.
This commit publicly exposes the method 'getLocalSlot' in the
'ModuleSlotTracker' class.

This change is useful for MIR serialization, to serialize the unnamed basic
block and unnamed alloca references.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:31:04 +00:00
Alexandros Lamprineas
10da90aaf3 - Added support for parsing HWDiv features using Target Parser.
- Architecture extensions are represented as a bitmap.

Phabricator: http://reviews.llvm.org/D11457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243335 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:26:59 +00:00
Colin LeMahieu
f78e199cb2 [llvm-mc] Pushing plumbing through for --fatal-warnings flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243334 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 21:56:53 +00:00
Sanjoy Das
39d6da003d [IndVars] Make loop varying predicates loop invariant.
Summary:
Was D9784: "Remove loop variant range check when induction variable is
strictly increasing"

This change re-implements D9784 with the two differences:

 1. It does not use SCEVExpander and does not generate new
    instructions.  Instead, it does a quick local search for existing
    `llvm::Value`s that it needs when modifying the `icmp`
    instruction.

 2. It is more general -- it deals with both increasing and decreasing
    induction variables.

I've added all of the tests included with D9784, and two more.

As an example on what this change does (copied from D9784):

Given C code:

```
for (int i = M; i < N; i++) // i is known not to overflow
  if (i < 0) break;
  a[i] = 0;
}
```

This transformation produces:

```
for (int i = M; i < N; i++)
  if (M < 0) break;
  a[i] = 0;
}
```

Which can be unswitched into:

```
if (!(M < 0))
  for (int i = M; i < N; i++)
    a[i] = 0;
}
```

I went back and forth on whether the top level logic should live in
`SimplifyIndvar::eliminateIVComparison` or be put into its own
routine.  Right now I've put it under `eliminateIVComparison` because
even though the `icmp` is not *eliminated*, it no longer is an IV
comparison.  I'm open to putting it in its own helper routine if you
think that is better.

Reviewers: reames, nicholas, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243331 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 21:42:49 +00:00
Sanjay Patel
ca5ed74463 remove unnecessary forward declaration; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243328 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 21:11:55 +00:00
Sanjay Patel
11e1f92d8d don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 21:03:03 +00:00
JF Bastien
27a03699ae WebAssembly: minor MCAsmInfo fixes
Summary:
Fix pointer / callee-save stack sto size.
Update comment character to be LISP-ish.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:46:51 +00:00
Simon Pilgrim
26c63eebd8 [X86][SSE] Added shuffle tests to demonstrate missed bitmask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:41:57 +00:00
Alex Lorenz
1c1ccc2527 MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:39:03 +00:00
Alex Lorenz
342851440d MIR Parser: Rename the standalone parsing methods. NFC.
This commit renames the methods 'parseMBB' and 'parseNamedRegister' to
'parseStandaloneMBB' and 'parseStandaloneNamedRegister' in order for their
names to be consistent with the method 'parseStandaloneVirtualRegister'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243319 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:29:27 +00:00
Bruno Cardoso Lopes
272154cc86 Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Still breaks some ARM buildbots. This reverts r243271.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:26:04 +00:00
Adam Nemet
150b5610ef [LAA] Upper-case variable names, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243313 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 19:38:50 +00:00
Adam Nemet
1829d59a2e [LAA] Split out a helper from addRuntimeCheck to generate the check, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 19:38:48 +00:00
Akira Hatanaka
6e208e96cc [AArch64] Remove check for Darwin that was needed to decide if x18 should
be reserved.

The decision to reserve x18 is going to be made solely by the front-end,
so it isn't necessary to check if the OS is Darwin in the backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 19:18:47 +00:00
Simon Pilgrim
eb30d38ac8 Fixed signed/unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243306 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 19:07:15 +00:00
Juergen Ributzka
39fccc4135 [AArch64][FastISel] Add more truncation tests.
This is a follow-up to r243198 and adds more truncation tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 19:00:23 +00:00
Simon Pilgrim
8e2e335276 [InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR
Now that we are generating sane codegen for vector sext/zext nodes on SSE targets, this patch uses instcombine to replace the SSE41/AVX2 pmovsx and pmovzx intrinsics with the equivalent native IR code.

Differential Revision: http://reviews.llvm.org/D11503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243303 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:52:15 +00:00
Pete Cooper
2deaa2924e Revert "Remove unnecessary null check. NFC."
This reverts commit r243167.

Duncan pointed out that dyn_cast can return null in these cases, so this
was an unsafe commit to make.  Sorry for the noise.

Worryingly there were no tests which fail...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:37:58 +00:00
Matt Arsenault
fd8928ded9 Fix assert when inlining a constantexpr addrspacecast
The pointer size of the addrspacecasted pointer might not have matched,
so this would have hit an assert in accumulateConstantOffset.

I think this was here to allow constant folding of a load of an
addrspacecasted constant. Accumulating the offset through the
addrspacecast doesn't make much sense, so something else is necessary
to allow folding the load through this cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:31:03 +00:00
Diego Novillo
55557ce3f8 Fix ODR violation. NFC.
There is an ODR conflict between lib/ExecutionEngine/ExecutionEngineBindings.cpp
and lib/Target/TargetMachineC.cpp. The inline definitions should simply
be marked static (thanks dblaikie for the hint).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243298 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:27:23 +00:00
JF Bastien
6a829ed9d4 Fix llvm-config to emit the linker flag for the combined shared object built by autoconfig/make instead of the individual components.
Summary:
When LLVM is configured to build shared libraries, CMake builds each component as it's own shared object, while autoconfig/make builds them statically and then links them all together to create a single shared object. This change adds compile time config flags to `llvm-config` so it can know whether LLVM's components are separated or not and act accordingly.

This fixes `llvm-config` instead of fixing the makefiles to behave like CMake because, AIUI, LLVM's autoconfig/make build system is on the way out anyway.

This change only affects `llvm-config` from builds that use autoconfig/make.

Reviewers: jfb

Subscribers: echristo, dschuff, llvm-commits

Differential Revision: http://reviews.llvm.org/D11392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243297 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:26:30 +00:00
Marek Olsak
dbd8d4f056 AMDGPU: don't match vgpr loads for constant loads
Author: Dave Airlie <airlied@redhat.com>

In order to implement indirect sampler loads, we don't
want to match on a VGPR load but an SGPR one for constants,
as we cannot feed VGPRs to the sampler only SGPRs.

this should be applicable for llvm 3.7 as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243294 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:16:08 +00:00
Sanjay Patel
5834764c65 move combineRepeatedFPDivisors logic into a helper function; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:58:49 +00:00