Chris Lattner
10f3597c4e
Remove some more unused stuff from MachineInstr that was leftover from V9.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:44:25 +00:00
Chris Lattner
b4432f3d47
Suck block address tracking out of targets into the JIT Emitter. This
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simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28082 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 17:10:41 +00:00
Nate Begeman
f4360a4789
Finish up the initial jump table implementation by allowing jump tables to
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not be 100% dense. Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 03:48:02 +00:00
Evan Cheng
c9a83a45ba
Bottom up register pressure reduction work: clean up some hacks and enhanced
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the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28076 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 02:10:45 +00:00
Owen Anderson
a69571c799
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
Chris Lattner
af1563fb62
Change the BasicBlockAddrs map to be a vector, indexed by MBB number.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28069 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 00:32:55 +00:00
Chris Lattner
f75f9be3fb
Several related changes:
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1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
from the MachineCodeEmitter interface, and reducing the amount of target-
specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
*right* next to the functions that they belong to, instead of in a separate
pool of memory. This makes all memory for a function be contiguous, and
means the JITEmitter only tracks one block of memory now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28065 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 23:22:24 +00:00
Chris Lattner
f5d438c1f0
Do not make the JIT memory manager manage the memory for globals. Instead
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just have the JIT malloc them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28062 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 21:57:51 +00:00
Chris Lattner
43b429b059
Refactor the machine code emitter interface to pull the pointers for the current
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code emission location into the base class, instead of being in the derived classes.
This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments. This implements feature request #1 of PR469.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28059 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 18:27:26 +00:00
Nate Begeman
9d51eeb8bc
Print function number instead of name
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28057 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 17:36:46 +00:00
Chris Lattner
b0cc79d45b
Remove dead method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28055 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 17:20:28 +00:00
Chris Lattner
3a9cfbaf86
Remove the debug machine code emitter. The "FilePrinterEmitter" is more
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useful for debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28051 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 16:59:24 +00:00
Nate Begeman
cdf38c4edb
Extend printBasicBlockLabel a bit so that it can be used to print all
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basic block labels, consolidating the code to do so in one place for each
target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28050 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 05:37:32 +00:00
Jeff Cohen
51b776d259
De-virtualize SwitchSection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28047 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 03:58:45 +00:00
Jeff Cohen
c6a057b04d
De-virtualize EmitZeroes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28046 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 03:46:13 +00:00
Jeff Cohen
c884db47f1
Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28044 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 01:16:28 +00:00
Chris Lattner
229924a79f
Fix a latent bug that my spiller patch last week exposed: we were leaving
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instructions in the virtregfolded map that were deleted. Because they
were deleted, newly allocated instructions could end up at the same address,
magically finding themselves in the map. The solution is to remove entries
from the map when we delete the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28041 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 22:03:24 +00:00
Chris Lattner
8a18c13fa5
When promoting a load to a reg-reg copy, where the load was a previous
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instruction folded with spill code, make sure the remove the load from
the virt reg folded map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 21:17:10 +00:00
Chris Lattner
35f2705e3d
Remove previous patch, which wasn't quite right.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28039 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 21:16:03 +00:00
Evan Cheng
22608c2d1f
Dis-favor stores more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28035 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 09:20:44 +00:00
Evan Cheng
f229a5d4be
Bottom up register-pressure reduction scheduler now pushes store operations
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up the schedule. This helps code that looks like this:
loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...
Without this change, the stores and computations are more likely to
interleave:
loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...
This can increase the number of spills if we are unlucky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28033 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 09:14:40 +00:00
Evan Cheng
3766d66b91
Didn't mean ScheduleDAGList.cpp to make the last checkin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28030 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 08:56:34 +00:00
Evan Cheng
10dbd3ead8
Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 08:54:57 +00:00
Chris Lattner
c80c43eee0
Format #APP lines a bit nicer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28026 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 04:11:03 +00:00
Evan Cheng
200370fb56
Local spiller kills a store if the folded restore is turned into a copy.
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But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-30 08:41:47 +00:00
Chris Lattner
25c344a758
Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c
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with some changes I have to the new CFE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28022 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 23:33:20 +00:00
Evan Cheng
55d0fa1bfa
Remove the temporary option: -no-isel-fold-inflight
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 18:54:11 +00:00
Evan Cheng
020c41f21e
TargetLowering::LowerArguments should return a VBIT_CONVERT of
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FORMAL_ARGUMENTS SDOperand in the return result vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 05:25:15 +00:00
Chris Lattner
ba1fc3daf7
Mapping of physregs can make it so that the designated and input physregs are
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the same. In this case, don't emit a noop copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28008 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 04:43:18 +00:00
Evan Cheng
552c4a8494
Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
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node can be folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28003 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 02:09:19 +00:00
Chris Lattner
addc55af6c
When we have a two-address instruction where the input cannot be clobbered
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and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy. This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write. As one example, this change does:
pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
xorps %XMM2, %XMM5
cmpltps %XMM1, %XMM0
- movaps XMMWORD PTR [%ESP + 52], %XMM0
- movapd %XMM6, XMMWORD PTR [%ESP + 52]
+ movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
movapd XMMWORD PTR [%ESP + 52], %XMM6
movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
cmpltps %XMM3, %XMM0
- movaps XMMWORD PTR [%ESP + 20], %XMM0
- movapd %XMM7, XMMWORD PTR [%ESP + 20]
+ movaps %XMM7, %XMM0
cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
movapd XMMWORD PTR [%ESP + 20], %XMM7
cmpltps %XMM4, %XMM0
... which is far better than a store followed by a load!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28001 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 01:46:50 +00:00
Evan Cheng
f7179bb56e
Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses
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(VAND, VADD, etc.). Legalizer will assert otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27991 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:29:42 +00:00
Chris Lattner
a83385fb7b
Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and
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PR748.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27987 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:01:07 +00:00
Evan Cheng
3b0d286d00
Don't forget return void.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27974 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 23:03:35 +00:00
Nate Begeman
9453eea49b
Fix the updating of the machine CFG when a PHI node was in a successor of
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the jump table's range check block. This re-enables 100% dense jump tables
by default on PPC & x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27952 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 06:26:20 +00:00
Nate Begeman
3700a4d3a2
Code cleanup associated with jump tables, thanks to Chris for noticing
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these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27950 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 23:52:35 +00:00
Nate Begeman
05f9466cf0
Turn of jump tables for a bit, there are still some issues to work out with
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updating the machine CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 23:51:56 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Chris Lattner
4a1cd9c61e
The BFS scheduler is apparently nondeterminstic (causes many llvmgcc bootstrap
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miscompares). Switch RISC targets to use the list-td scheduler, which isn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 17:16:16 +00:00
Chris Lattner
ef027f940c
Fix a couple more memory issues
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 15:32:26 +00:00
Chris Lattner
fedced7bc3
Fix a really subtle and obnoxious memory bug that caused issues with an
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llvm-gcc4 boostrap. Whenever a node is deleted by the dag combiner, it
*must* be returned by the visit function, or the dag combiner will not
know that the node has been processed (and will, e.g., send it to the
target dag combine xforms).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 23:55:59 +00:00
Chris Lattner
1b87c42c82
This field no longer exists
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27899 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 18:32:41 +00:00
Chris Lattner
02e5f8dcda
Remove some of the obvious V9-specific cruft
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 18:08:53 +00:00
Evan Cheng
44f1f09b4e
Turn a VAND into a VECTOR_SHUFFLE is applicable.
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DAG combiner can turn a VAND V, <-1, 0, -1, -1>, i.e. vector clear elements,
into a vector shuffle with a zero vector. It only does so when TLI tells it
the xform is profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27874 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 08:56:16 +00:00
Chris Lattner
62b5772959
Implement folding of a bunch of binops with undef
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27863 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 05:39:12 +00:00
Chris Lattner
89a1b380a4
Simplify some code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27846 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 23:17:50 +00:00
Chris Lattner
80edfb3af5
Fix handling of calls in functions that use vectors. This fixes a crash on
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the code in GCC PR26546.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27780 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:10:08 +00:00
Chris Lattner
48d7c069c7
Add a MachineInstr::eraseFromParent convenience method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:35:41 +00:00
Chris Lattner
8d5a894501
Codegen insertelement with constant insertion points as scalar_to_vector
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and a shuffle. For this:
void %test2(<4 x float>* %F, float %f) {
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
%tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
%tmp2 = insertelement <4 x float> %tmp3, float %f, uint 2 ; <<4 x float>> [#uses=2]
%tmp6 = add <4 x float> %tmp2, %tmp2 ; <<4 x float>> [#uses=1]
store <4 x float> %tmp6, <4 x float>* %F
ret void
}
we now get this on X86 (which will get better):
_test2:
movl 4(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, %xmm1
shufps $3, %xmm1, %xmm1
movaps %xmm0, %xmm2
shufps $1, %xmm2, %xmm2
unpcklps %xmm1, %xmm2
movss 8(%esp), %xmm1
unpcklps %xmm1, %xmm0
unpcklps %xmm2, %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
ret
instead of:
_test2:
subl $28, %esp
movl 32(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%esp)
movss 36(%esp), %xmm0
movss %xmm0, 8(%esp)
movaps (%esp), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
addl $28, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27765 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 19:21:01 +00:00
Chris Lattner
2efce0a589
Add support for promoting stores from one legal type to another, allowing us
...
to write one pattern for vector stores instead of 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27730 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 01:36:45 +00:00
Chris Lattner
547a16f273
Make these predicates return true for bit_convert(buildvector)'s as well as
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buildvectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27723 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 23:38:00 +00:00
Chris Lattner
3824e50b1e
Make this assertion better
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27695 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 06:08:35 +00:00
Reid Spencer
60d07eeffe
Expand some code with temporary variables to rid ourselves of the warning
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about "dereferencing type-punned pointer will break strict-aliasing rules"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27671 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 18:29:58 +00:00
Evan Cheng
cc9876124e
Promote vector AND, OR, and XOR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27632 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 21:20:24 +00:00
Evan Cheng
41f6cbbeb2
Vector type promotion for ISD::LOAD and ISD::SELECT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 16:33:18 +00:00
Chris Lattner
fdfded5588
Implement support for the formal_arguments node. To get this, targets shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 16:20:43 +00:00
Chris Lattner
9d956250f5
Don't memoize vloads in the load map! Don't memoize them anywhere here, let
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getNode do it. This fixes CodeGen/Generic/2006-04-11-vecload.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27602 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 03:25:41 +00:00
Evan Cheng
98f8aeb45f
Only get Tmp2 for cases where number of operands is > 1. Fixed return void.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27586 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 06:33:39 +00:00
Chris Lattner
b49e52c7e2
add some todos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 02:00:08 +00:00
Chris Lattner
f87324e44d
Add basic support for legalizing returns of vectors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27578 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 01:31:51 +00:00
Jim Laskey
1069fbdd2f
Use existing information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27574 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 23:09:19 +00:00
Evan Cheng
db3c626eb9
Missing break
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 18:54:36 +00:00
Chris Lattner
b22e35a3c3
Add code generator support for VSELECT
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 22:22:57 +00:00
Chris Lattner
17614ea63d
Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patterns
...
to match again :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27533 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 05:34:25 +00:00
Chris Lattner
3e104b1116
Codegen shufflevector as VVECTOR_SHUFFLE
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27529 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 04:15:24 +00:00
Chris Lattner
4ddd283f69
add a sanity check: LegalizeOp should return a value that is the same type
...
as its input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27528 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 04:13:17 +00:00
Evan Cheng
f6bf87f2cc
INSERT_VECTOR_ELT lowering bug:
...
store vector to $esp
store element to $esp + sizeof(VT) * index
load vector from $esp
The bug is VT is the type of the vector element, not the type of the vector!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27517 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 01:46:37 +00:00
Chris Lattner
67f1351498
Stub out shufflevector
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27514 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 01:19:25 +00:00
Jim Laskey
f36e2d3415
Remove section change in function end, preventing override of function's real
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section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27503 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 00:35:59 +00:00
Jim Laskey
6b92b8e50d
Make sure that debug labels are defined within the same section and after the
...
entry point of a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27494 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 20:44:42 +00:00
Jim Laskey
4188699f80
Foundation for call frame information.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 16:34:46 +00:00
Evan Cheng
c04766a228
1. If both vector operands of a vector_shuffle are undef, turn it into an undef.
...
2. A shuffle mask element can also be an undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27472 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 23:20:43 +00:00
Chris Lattner
2e2ef95350
Make a vector live across blocks have the correct Vec type. This fixes
...
CodeGen/X86/2006-04-04-CrossBlockCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 06:54:42 +00:00
Evan Cheng
18dd6d0a2a
Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded
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or custom lowering fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27432 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 06:07:11 +00:00
Chris Lattner
e44be60ee9
Do not create ZEXTLOAD's unless we are before legalize or the operation is
...
legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27402 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:39:18 +00:00
Chris Lattner
4352cc9e21
* Add supprot for SCALAR_TO_VECTOR operations where the input needs to be
...
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27399 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:23:26 +00:00
Chris Lattner
08da55eeff
Constant fold bitconvert(undef)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27391 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 01:02:22 +00:00
Chris Lattner
4672f71ac4
The stack alignment is now computed dynamically, just verify it is correct.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 21:39:57 +00:00
Chris Lattner
7dca8e2d73
Remove unused method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27379 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 21:39:03 +00:00
Chris Lattner
97c2073270
Add a missing check, this fixes UnitTests/Vector/sumarray.c
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 17:29:28 +00:00
Chris Lattner
a4c5d8c6b4
Add a missing check, which broke a bunch of vector tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 17:21:50 +00:00
Andrew Lenharth
cf4fb61f6c
back this out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 03:16:50 +00:00
Andrew Lenharth
50a0d426e8
This should be a win of every arch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 21:42:45 +00:00
Chris Lattner
1b5232a937
relax assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:19:46 +00:00
Chris Lattner
1482b5fc7a
Allow targets to compute masked bits for intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:15:09 +00:00
Chris Lattner
350bec0fb9
Add a little dag combine to compile this:
...
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
%tmp1 = load <4 x float>* %in ; <<4 x float>> [#uses=1]
%tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 ) ; <int> [#uses=1]
%tmp = seteq int %tmp, 0 ; <bool> [#uses=1]
%tmp3 = cast bool %tmp to int ; <int> [#uses=1]
ret int %tmp3
}
into this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
mtspr 256, r2
blr
instead of this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
xori r3, r3, 1
cntlzw r3, r3
srwi r3, r3, 5
mtspr 256, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:11:11 +00:00
Chris Lattner
4aab2f4ab5
Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:06:04 +00:00
Chris Lattner
bc70cf8be9
Implement the Expand action for binary vector operations to break the binop
...
into elements and operate on each piece. This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:57:31 +00:00
Chris Lattner
e58a780166
Intrinsics that just load from memory can be treated like loads: they don't
...
have to serialize against each other. This allows us to schedule lvx's
across each other, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:41:14 +00:00
Chris Lattner
edab1b9133
Constant fold all of the vector binops. This allows us to compile this:
...
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"
aka:
void %test2(<16 x sbyte>* %P) {
store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
ret void
}
into this:
_test2:
mfspr r2, 256
oris r4, r2, 32768
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
lvx v0, r5, r4
stvx v0, 0, r3
mtspr 256, r2
blr
instead of this:
_test2:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
vspltisb v0, 8
lvx v1, r5, r4
vxor v0, v1, v0
stvx v0, 0, r3
mtspr 256, r2
blr
... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:25:57 +00:00
Chris Lattner
5e46a19ec8
Add a new -view-legalize-dags command line option
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:07:27 +00:00
Chris Lattner
6258fb2592
Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:53:43 +00:00
Chris Lattner
5e08a11039
These entries already exist
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:51:27 +00:00
Chris Lattner
97d23335ad
Add some missing node names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:41:18 +00:00
Chris Lattner
f8814cf8b8
Prefer larger register classes over smaller ones when a register occurs in
...
multiple register classes. This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 00:24:45 +00:00
Chris Lattner
f1d0c623c6
Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:16:43 +00:00
Chris Lattner
c741ea424a
Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC.
...
Now all UnitTests/Vector/* tests pass on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:22:37 +00:00
Chris Lattner
d9731af75b
Do not endian swap the operands to a store if the operands came from a vector.
...
This fixes UnitTests/Vector/simple.c with altivec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:20:46 +00:00
Chris Lattner
29cd7db310
Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt
...
to:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 12, r32
;;
ldfs f8 = [r8]
mov ar.pfs = r3
br.ret.sptk.many rp
instead of:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 28, r32
adds r9 = 24, r32
adds r10 = 20, r32
adds r11 = 16, r32
;;
ldfs f6 = [r8]
;;
ldfs f6 = [r9]
adds r8 = 12, r32
adds r9 = 8, r32
adds r14 = 4, r32
;;
ldfs f6 = [r10]
;;
ldfs f6 = [r11]
ldfs f8 = [r8]
;;
ldfs f6 = [r9]
;;
ldfs f6 = [r14]
;;
ldfs f6 = [r32]
mov ar.pfs = r3
br.ret.sptk.many rp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:10:41 +00:00
Chris Lattner
e4b953939c
Delete dead loads in the dag. This allows us to compile
...
vector.ll:test_extract_elt2 into:
_test_extract_elt2:
lfd f1, 32(r3)
blr
instead of:
_test_extract_elt2:
lfd f0, 56(r3)
lfd f0, 48(r3)
lfd f0, 40(r3)
lfd f1, 32(r3)
lfd f0, 24(r3)
lfd f0, 16(r3)
lfd f0, 8(r3)
lfd f0, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:06:18 +00:00