Chris Lattner
e7fd553b3b
Move some methods out of line so that MutexGuard.h isn't needed in a public header.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28179 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 22:00:52 +00:00
Chris Lattner
9fd868ae0a
Another bad case I noticed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 21:39:45 +00:00
Chris Lattner
8ef67ac3c3
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28176 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 21:24:21 +00:00
Chris Lattner
4b37e87ab9
Make the case I just checked in stronger. Now we compile this:
...
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
to:
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test2:
add r2, r3, r4
extsh r2, r2
srwi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 21:18:59 +00:00
Chris Lattner
eaeda56649
Implement and_sext.ll:test3, generating:
...
_test4:
srawi r3, r3, 16
blr
instead of:
_test4:
srwi r2, r3, 16
extsh r3, r2
blr
for:
short test4(unsigned X) {
return (X >> 16);
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:59:41 +00:00
Nate Begeman
7514620052
Yet more readme updating
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28172 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:54:02 +00:00
Chris Lattner
a850446a0b
Compile this:
...
short test4(unsigned X) {
return (X >> 16);
}
to:
_test4:
movl 4(%esp), %eax
sarl $16, %eax
ret
instead of:
_test4:
movl $-65536, %eax
andl 4(%esp), %eax
sarl $16, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:51:54 +00:00
Nate Begeman
fcf64a91d6
New note about something bad happening in target independent optimizers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28170 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:08:28 +00:00
Nate Begeman
d8624ed07f
Proving once again that I am not as smart as the compiler
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 19:09:24 +00:00
Nate Begeman
4667f2cbad
Fold more shifts into inserts, and update the README
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28168 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 17:38:32 +00:00
Chris Lattner
2cfd6746ae
Fold shifts with undef operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 17:29:49 +00:00
Chris Lattner
1b7371331f
When tracking demanded bits, if any bits from the sext of an SRA are demanded,
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then so is the input sign bit. This fixes mediabench/g721 on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 17:22:53 +00:00
Nate Begeman
17c275ff2c
Make emission of jump tables a bit less conservative; they are now required
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to be only 31.25% dense, rather than 75% dense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 16:51:36 +00:00
Evan Cheng
403be7eafc
Fixing truncate. Previously we were emitting truncate from r16 to r8 as
...
movw. That is we promote the destination operand to r16. So
%CH = TRUNC_R16_R8 %BP
is emitted as
movw %bp, %cx.
This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.
We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.
Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 08:01:26 +00:00
Nate Begeman
93376b083e
Update some stuff now that the new rlwimi code has gone in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 02:52:38 +00:00
Nate Begeman
5c742681ed
Fix PR772
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 01:35:01 +00:00
Evan Cheng
74811450b2
Typo's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-07 10:10:20 +00:00
Jeff Cohen
e564de2d37
Unlike Unix, Windows won't let a file be implicitly replaced via renaming without explicit permission.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28157 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-07 02:51:51 +00:00
Nate Begeman
77f361f5b3
New rlwimi implementation, which is superior to the old one. There are
...
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield. More regression tests
to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-07 00:23:38 +00:00
Chris Lattner
822db93e57
Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
...
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:48:13 +00:00
Chris Lattner
e60351bb72
Add some more sign propagation cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:40:29 +00:00
Jeff Cohen
943b9b6651
Apply bug fix supplied by Greg Pettyjohn for a bug he found: '<invalid>' is not a legal path on Windows.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28153 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:25:53 +00:00
Chris Lattner
310b578023
Simplify some code, add a couple minor missed folds
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:06:26 +00:00
Chris Lattner
b9ebacdb4d
constant fold sign_extend_inreg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:05:41 +00:00
Chris Lattner
541a24f7af
remove cases handled elsewhere
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 22:43:44 +00:00
Chris Lattner
d6f7fe76a6
Add some more simple sign bit propagation cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 22:39:59 +00:00
Jeff Cohen
d43b18d9e4
Fix some loose ends in MASM support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 21:27:14 +00:00
Chris Lattner
ee4ea92358
Use the new TargetLowering::ComputeNumSignBits method to eliminate
...
sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:
short test(short X, short x) {
int Y = X+x;
return (Y >> 1);
}
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
into:
_test:
add r2, r3, r4
srawi r3, r2, 1
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test:
add r2, r3, r4
srawi r2, r2, 1
extsh r3, r2
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:30:03 +00:00
Chris Lattner
5c3e21d687
Add some really really simple code for computing sign-bit propagation.
...
This will certainly be enhanced in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:27:13 +00:00
Chris Lattner
f0df8824eb
When inserting casts, be careful of where we put them. We cannot insert
...
a cast immediately before a PHI node.
This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:10:37 +00:00
Chris Lattner
33a6113995
Move some code around.
...
Make the "fold (and (cast A), (cast B)) -> (cast (and A, B))" transformation
only apply when both casts really will cause code to be generated. If one or
both doesn't, then this xform doesn't remove a cast.
This fixes Transforms/InstCombine/2006-05-06-Infloop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28141 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:00:16 +00:00
Chris Lattner
80a7ecc923
Teach the X86 backend about non-i32 inline asm register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:29:37 +00:00
Chris Lattner
c93dfda905
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:11:52 +00:00
Chris Lattner
b72773bb88
Fold trunc(any_ext). This gives stuff like:
...
27,28c27
< movzwl %di, %edi
< movl %edi, %ebx
---
> movw %di, %bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:56:26 +00:00
Chris Lattner
06afe07037
Shrink shifts when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:53:17 +00:00
Chris Lattner
fe8babf689
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:32:12 +00:00
Chris Lattner
35c3913328
Print a grouping around inline asm blocks so that we can tell when we are
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using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28134 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:50:04 +00:00
Chris Lattner
7660ebc90a
Print *some* grouping around inline asm blocks so we know where they are.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:48:50 +00:00
Chris Lattner
1c05997bd8
Indent multiline asm strings more nicely
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:47:05 +00:00
Chris Lattner
bd04aa5796
Teach the code generator to use cvtss2sd as extload f32 -> f64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Chris Lattner
e564dbb51c
Fold (fpext (load x)) -> (extload x)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:34:35 +00:00
Chris Lattner
903236468c
More aggressively sink GEP offsets into loops. For example, before we
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generated:
movl 8(%esp), %eax
movl %eax, %edx
addl $4316, %edx
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, (%edx)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
movl %edx, 4460(%eax)
ret
...
Now we generate:
movl 8(%esp), %eax
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, 4316(%eax)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
movl %ecx, 4460(%eax)
ret
... which uses one fewer register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:17:49 +00:00
Chris Lattner
581a7ad7c9
Fix an infinite loop compiling oggenc last night.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28128 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 20:51:30 +00:00
Evan Cheng
4713724eda
Need extload patterns after Chris' DAG combiner changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28127 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 08:23:07 +00:00
Chris Lattner
6fc205fc44
Implement InstCombine/cast.ll:test29
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28126 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:39:07 +00:00
Chris Lattner
0d8dae749c
Fold some common code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:32:04 +00:00
Chris Lattner
540121f1ec
Implement:
...
// fold (and (sext x), (sext y)) -> (sext (and x, y))
// fold (or (sext x), (sext y)) -> (sext (or x, y))
// fold (xor (sext x), (sext y)) -> (sext (xor x, y))
// fold (and (aext x), (aext y)) -> (aext (and x, y))
// fold (or (aext x), (aext y)) -> (aext (or x, y))
// fold (xor (aext x), (aext y)) -> (aext (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:31:05 +00:00
Chris Lattner
a3dc3f692c
Pull and through and/or/xor. This compiles some bitfield code to:
...
mov EAX, DWORD PTR [ESP + 4]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
or EDX, ECX
and EDX, -2147483648
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
ret
instead of:
sub ESP, 4
mov DWORD PTR [ESP], ESI
mov EAX, DWORD PTR [ESP + 8]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
mov ESI, ECX
and ESI, -2147483648
and EDX, -2147483648
or EDX, ESI
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
mov ESI, DWORD PTR [ESP]
add ESP, 4
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 06:10:43 +00:00
Chris Lattner
5ffc066912
Implement a variety of simplifications for ANY_EXTEND.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:58:59 +00:00
Chris Lattner
35e5c14b80
Factor some code, add these transformations:
...
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
// fold (or (trunc x), (trunc y)) -> (trunc (or x, y))
// fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:51:50 +00:00