Commit Graph

76589 Commits

Author SHA1 Message Date
Jim Grosbach
98602ac9a9 ARM Fixup valus for movt/movw are for the whole value.
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:23:05 +00:00
Akira Hatanaka
d80c13bfed Check values of immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:19:21 +00:00
Jakob Stoklund Olesen
7850dd0f25 Fix a bug in compare_numeric().
Thanks to Alexandru Dura and Jonas Paulsson for finding it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:03:55 +00:00
Duncan Sands
5bc93e782e Add forgotten tests that the cleanup flag is cleared if there
is a catch-all landingpad clause.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:00:34 +00:00
Danil Malyshev
0ba3c0ab63 MCJIT initialization TargetData
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 16:40:10 +00:00
Justin Holewinski
f51b7e5d74 PTX: Various stylistic and code readability changes recommended by Jim Grosbach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140855 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 14:36:36 +00:00
Justin Holewinski
8c1dac54f2 PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs.
Also take this opportunity to clean up the rounding mode pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 13:46:52 +00:00
Duncan Sands
0ad7b6e773 Inlining often produces landingpad instructions with repeated
catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 13:12:16 +00:00
Torok Edwin
f16e2d4b2a some 3.0 API notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 13:07:52 +00:00
Torok Edwin
d398bae0e0 Comment grammar fixes.
thanks to Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 13:07:47 +00:00
Justin Holewinski
c90e149ee4 PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires
us to manually provide Pat<> definitions for all FP instruction patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 12:54:43 +00:00
Torok Edwin
10a11ecb59 Instead of crashing when MCAsmInfo is NULL, add an assert.
This helps with porting code from 2.9 to 3.0 as TargetSelect.h changed location,
and if you include the old one by accident you will trigger this assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 12:31:57 +00:00
Akira Hatanaka
25a7d94e81 Mips64 shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 03:18:46 +00:00
Akira Hatanaka
f549ab7853 Mips64 arithmetic and logical instructions with one source register and
immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 02:08:54 +00:00
Jim Grosbach
4ebbf7b8a8 ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 00:50:06 +00:00
Jakob Stoklund Olesen
203e0b17dd Precompute a bit vector of register sub-classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140827 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 00:10:40 +00:00
Jakob Stoklund Olesen
7dcaa5b0fb Order register classes topologically.
All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.

This will be used to simplify some sub-class operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 00:10:36 +00:00
Akira Hatanaka
a3defb07a0 Fill delay slot with useful instructions. Modified from Sparc's version of delay
slot filler.

Patch by Reed Kotler at Mips Technologies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 23:52:13 +00:00
Bill Wendling
e00897c5a9 Create a machine basic block in the constant pool and retrieve the symbol for an MBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140824 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 23:50:42 +00:00
Bill Wendling
4dd9b091cc Support creating a constant pool value for a machine basic block.
This is used when we want to take the address of a machine basic block, but it's
not associated with a BB in LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 23:48:44 +00:00
Nick Lewycky
48105286cb Fold two identical set lookups into one. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 23:40:12 +00:00
Jakob Stoklund Olesen
29f018cee6 Switch to ArrayRef<CodeGenRegisterClass*>.
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 22:28:37 +00:00
Dan Gohman
27e0666725 When eliminating unnecessary retain+autorelease on return values,
handle the case where the retain is in a different basic block.
rdar://10210274.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140815 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 22:27:34 +00:00
Dan Gohman
597fece886 Don't eliminate objc_retainBlock calls on stack objects if the
objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 22:25:23 +00:00
Jim Grosbach
026fa8782c Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 21:43:01 +00:00
Nick Lewycky
5fa301bfa9 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 21:07:46 +00:00
Akira Hatanaka
c0be26909f Mips64 arithmetic and logical instructions with two source registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140806 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 20:37:56 +00:00
Eli Friedman
bb5a7442e3 Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 20:21:17 +00:00
Devang Patel
0066f9290e Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 17:06:40 +00:00
Devang Patel
a5ef699f41 Clarify comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 16:52:53 +00:00
Devang Patel
8d6c0fb979 Remove unnecessary and unused data member.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 16:48:44 +00:00
Devang Patel
7a50202be5 Cosmetic changes, as per Nick's review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140785 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 16:46:47 +00:00
Duncan Sands
9a7d48ae67 Place this bracket according to the LLVM style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140784 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 16:01:46 +00:00
Justin Holewinski
2097d702d4 PTX: Fix broken shared library build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 14:25:48 +00:00
Jakob Stoklund Olesen
92fb79b7a6 Expand the x86 V_SET0* pseudos right after register allocation.
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 05:10:54 +00:00
NAKAMURA Takumi
13f4a6c940 Target/ARM: Unbreak! CMake! Build!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 03:32:49 +00:00
Jakob Stoklund Olesen
adcb634d85 Delete NEONMoveFix, now unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 02:56:45 +00:00
Jakob Stoklund Olesen
8bb3d3cb30 Use ExecutionDepsFix instead of NEONMoveFix.
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 02:48:41 +00:00
Andrew Trick
5219f86a0b typo + pasto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:53:08 +00:00
Jakob Stoklund Olesen
cc84cda919 Remove NumImplicitOps which is now unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:47:36 +00:00
Andrew Trick
0c01bc385a LSR: rewrite inner loops only.
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140762 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:33:38 +00:00
Andrew Trick
03b08764d2 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:31:48 +00:00
Andrew Trick
f47e870015 Fix build failures better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:22:31 +00:00
Daniel Dunbar
7f3654db0c Fix build failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:14:42 +00:00
Bill Wendling
3511cedf36 Move to ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:13:55 +00:00
Justin Holewinski
d57c1bc0b6 PTX: Add new patterns for bitconvert and any_extend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140753 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:13:12 +00:00
Michael J. Spencer
75c4abacaa llvm-size: Apply Chris's code review fixes.
This doesn't use formated_raw_ostream because it doesn't support the
functionality needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:59:18 +00:00
Eric Christopher
12eb3ad5d6 Use the local we already set up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:50:59 +00:00
Jakob Stoklund Olesen
3627a46293 Rewrite MachineInstr::addOperand() to avoid NumImplicitOps.
The function needs to scan the implicit operands anyway, so no
performance is won by caching the number of implicit operands added to
an instruction.

This also fixes a bug when adding operands after an implicit operand has
been added manually.  The NumImplicitOps count wasn't kept up to date.

MachineInstr::addOperand() will now consistently place all explicit
operands before all the implicit operands, regardless of the order they
are added.  It is possible to change an MI opcode and add additional
explicit operands.  They will be inserted before any existing implicit
operands.

The only exception is inline asm instructions where operands are never
reordered.  This is because of a hack that marks explicit clobber regs
on inline asm as <implicit-def> to please the fast register allocator.
This hack can go away when InstrEmitter and FastIsel can add exact
<dead> flags to physreg defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:40:51 +00:00
Daniel Dunbar
caf1912893 tblgen/ClangDiagnostics: Add support for split default warning "no-werror" and
"show-in-system-header" bits, which I will be adding in Clang shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140741 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 00:29:04 +00:00