Commit Graph

106773 Commits

Author SHA1 Message Date
David Majnemer
e8be18e8a3 InstCombine: Combine (add (and %a, %b) (or %a, %b)) to (add %a, %b)
What follows bellow is a correctness proof of the transform using CVC3.

$ < t.cvc
A, B : BITVECTOR(32);

QUERY BVPLUS(32, A & B, A | B) = BVPLUS(32, A, B);

$ cvc3 < t.cvc
Valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215400 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:32:02 +00:00
Tom Stellard
13f4476c55 R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
This saves us from having to copy a 64-bit 0 value into VGPRs for
BUFFER_* instruction which only have a 12-bit immediate offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:17 +00:00
Tom Stellard
f56c55d003 R600/SI: Add an _OFFEN variant MUBUF_STORE_* and use it for scratch writes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:14 +00:00
Tom Stellard
68e9ebbe44 R600/SI: Add check for low 32 bits of encoding to mubuf tests
There are no variable values like registers encoded in the low 32 bits of MUBUF
instructions, so it is relatively easy to check these bits, and it will
help prevent us from introducing encoding bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215397 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:11 +00:00
Tom Stellard
728d0e4218 R600/SI: Clear lds bit on MUBUF instructions used for private stores
This bit was left uninitialized, which was causing some random failures
of piglit tests.

NOTE: This is a candidate for the 3.5 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215396 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:09 +00:00
Tom Stellard
0df264a0fd R600/SI: Fix broken test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215395 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:05 +00:00
Quentin Colombet
1b425402eb Add isRegSequence property.
This patch adds a new property: isRegSequence and the related target hooks: 
TargetIntrInfo::getRegSequenceInputs and 
TargetInstrInfo::getRegSequenceLikeInputs to specify that a target specific
instruction is a (kind of) REG_SEQUENCE.

<rdar://problem/12702965>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215394 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:17:14 +00:00
Quentin Colombet
7f4f923aa5 [AArch64] Fix registerAllocator assigns same register for base and wback in
pre/post-index load and store.

Patch by Steven Wu <stevenwu@apple.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215390 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 21:39:53 +00:00
Adrian Prantl
7189d07d62 Debug info: Remove an obsolete constructor from DebugLocEntry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 21:06:03 +00:00
Adrian Prantl
db72188598 Debug info: Modify DebugLocEntry::addValue to take multiple values so it
only has to sort/unique values once per batch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 21:06:00 +00:00
Adrian Prantl
59b604983e Debug info: Further simplify the implementation of buildLocationList by
getting rid of the redundant DIVariable in the OpenRanges pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215385 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 21:05:57 +00:00
Adrian Prantl
b89cf2aa6e Debug Info: Move the sorting and uniqueing of pieces from emitLocPieces()
into buildLocationList(). By keeping the list of Values sorted,
DebugLocEntry::Merge can also merge multi-piece entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215384 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 21:05:55 +00:00
Adrian Prantl
0ca6b9f076 Debug info: Refactor DebugLocEntry's Merge function to make
buildLocationLists easier to read.

The previous implementation conflated the merging of individual pieces
and the merging of entire DebugLocEntries.

By splitting this functionality into two separate functions the intention
of the code should be clearer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215383 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 20:59:28 +00:00
Saleem Abdulrasool
6c2be4ff95 ARM: try harder to detect non-IT eligible instructions
For many Thumb-1 register register instructions, setting the CPSR is not
permitted inside an IT block.  We would not correctly flag those instructions.
The previous change to identify this scenario was insufficient as it did not
actually catch all the instances.  The current list is formed by manual
inspection of the ARMv6M ARM.

The change to the Thumb2 IT block test is due to the fact that the new more
stringent checking of the MIs results in the If Conversion pass being prevented
from executing (since not all the instructions in the BB are predicable).  This
results in code gen changes.

Thanks to Tim Northover for pointing out that the previous patch was
insufficient and hinting that the use of the v6M ARM would be much easier to use
than the v7 or v8!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 20:13:25 +00:00
Rafael Espindola
b2d2f28351 Fix using -plugin-opt=apiflie when also using -plugin-opt=emit-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215378 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 19:06:54 +00:00
Sanjay Patel
7c0fa0cfab Correct a missing RUN line in the ARM codegen test for fneg ops. We should also explicitly specify +/-neonfp.
The bug was introduced at r99570 when use of "-arm-use-neon-fp" was removed.

Differential Revision: http://reviews.llvm.org/D4846



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 19:04:28 +00:00
Reid Kleckner
d7f37d823b Add missing test for r215031
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 18:34:54 +00:00
Reid Kleckner
b81e6cf6c5 MC: Diagnose an unexpected token in COFF .section instead of asserting
This can easily arise when trying to assemble and ELF style .section
directive for a COFF object file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 18:34:43 +00:00
Sylvestre Ledru
a7f0941b83 Fix typos:
* libaries => libraries
* avaiable => available



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215366 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 18:04:46 +00:00
Rafael Espindola
69ca26cc97 Fix use of uninitialized variable.
Fixes linking bitcode files that use the new style comdats for constructors
with ones that don't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 17:07:34 +00:00
Rafael Espindola
cb7da63124 Use an early return. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215363 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 16:55:42 +00:00
Daniel Sanders
e20f611baf Revert r215359 - [mips] Implement .ent, .end, .frame, .mask and .fmask assembler directives
It seems to cause an lld test (elf/Mips/hilo16-3.test) to fail. Reverted while we investigate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 16:10:19 +00:00
Daniel Sanders
36cf28e70e [mips] Implement .ent, .end, .frame, .mask and .fmask assembler directives
Patch by Matheus Almeida and Toma Tabacu

Differential Revision: http://reviews.llvm.org/D4179


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 15:28:56 +00:00
Hans Wennborg
efa23d332a PeepholeOptimizer: make parameter ref to SmallPtrSetImpl
This makes the function type independent of the in-line size
of LocalMIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 13:52:46 +00:00
Hans Wennborg
4d97a1a559 Make this SmallVector size a power of two as suggested by Chandler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 13:47:57 +00:00
Tim Northover
af713d3ba7 AArch64: add support for dynamic-loader relocations
LLD needs them, and it's good to be able to print them properly when
our object dumpers encounter them.

Patch by Daniel Stewart.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 10:10:27 +00:00
Elena Demikhovsky
e659e17483 AVX-512: added a missing bitcast from v16f32 to v16i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 09:59:08 +00:00
Tim Northover
f34a60c920 llvm-readobj: zero out timestamp in COFF auto-generated test files.
The timestamp meant these files changed with each invocation of
relocs.py, confusing matters when we add relocations and need to
update the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 09:53:07 +00:00
Tim Northover
835cfaa11b llvm-objdump: fix remaining use of %x format specifier for 64-bit values
Third time lucky. This should finally fix the ARM (& MIPS, I think) bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 09:14:06 +00:00
Oliver Stannard
17ef00ea94 ARM: __gnu_h2f_ieee and __gnu_f2h_ieee always use the soft-float calling convention
By default, LLVM uses the "C" calling convention for all runtime
library functions. The half-precision FP conversion functions use the
soft-float calling convention, and are needed for some targets which
use the hard-float convention by default, so must have their calling
convention explicitly set.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 09:12:32 +00:00
Jiangning Liu
0679d2d0a4 In Machine CSE pass, the source register of a COPY machine instruction can
be propagated to all its users, and this propagation could increase the 
probability of finding common subexpressions. If the COPY has only one user,
the COPY itself can be removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215344 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 05:17:19 +00:00
Jiangning Liu
1505fa4376 In LVI(Lazy Value Info), originally value on a BB can only be caculated once,
and the lattice will be updated to be a state other than "undefined". This
limiation could miss some opportunities of lowering "overdefined" to be an
even accurate value. So this patch ask the algorithm to try to lower the
lattice value again even if the value has been lowered to be "overdefined".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 05:02:04 +00:00
Hans Wennborg
07f1b21cb5 Re-commit "Increase the size of this SmallVector in PeepholeOptimizer." (r215340)
This time, also update the function that receives a reference to the SmallPtrSet as
a parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215342 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:50:43 +00:00
Hans Wennborg
cb57e03fa3 Revert "Increase the size of this SmallVector in PeepholeOptimizer." (r215340)
That broke the build:

/data/buildslave/clang-amd64-freebsd/src-llvm/lib/CodeGen/PeepholeOptimizer.cpp:729:46: error: non-const lvalue reference to type 'SmallPtrSet<[...], 8>' cannot bind to a value of unrelated type 'SmallPtrSet<[...], 16>'
        Changed |= optimizeExtInstr(MI, MBB, LocalMIs);
                                             ^~~~~~~~
/data/buildslave/clang-amd64-freebsd/src-llvm/lib/CodeGen/PeepholeOptimizer.cpp:265:49: note: passing argument to parameter 'LocalMIs' here
                 SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
                                                ^




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215341 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:34:52 +00:00
Hans Wennborg
9796e980eb Increase the size of this SmallVector in PeepholeOptimizer.
During a Clang build, the median size of this was 9

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215340 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:34 +00:00
Hans Wennborg
9af090246d SubTargetFeature.cpp: it seems the size of this SmallVector should be 3
because some subtarget feature strings have three components.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:32 +00:00
Hans Wennborg
e4506cddc5 Increase the size of SpillPlacement::BlockFrequencies.
This SmallVector's median size during a Clang build was 7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:30 +00:00
Hans Wennborg
bf5a4c36bc LegacyPassManagers.h: increase the size of PMDataManager::HigherLevelAnalysis.
In a Clang bootstrap, the median and max size was 9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:25 +00:00
Hans Wennborg
edcf61a55c Increase the size of these SmallVectors in X86ISelLowering.cpp.
In a Clang bootstrap, their sizes were always 12, 16 and 16, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:22 +00:00
Hans Wennborg
d9dd9692af Increase the size of this SmallVector in CloneNodeWithValues.
In a Clang bootstrap, the size of this vector was always 6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215335 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:21:19 +00:00
Hans Wennborg
6adf338dc3 Increase the size of DwarfAccelTable::TableHeaderData::Atoms.
During a Clang bootstrap, it seems this SmallVector always contains 3 elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215334 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:18:15 +00:00
Hans Wennborg
75762d6eae Increase the size of PMTopLevelManager::ImmutablePasses from 8 to 16.
During a bootstrap build of Clang, this SmallVector always held 14 elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 02:17:15 +00:00
Petar Jovanovic
97b0c63f6b Add support for scalarizing cttz_zero_undef
Follow up to r214266. Add missing case in ScalarizeVectorResult() for
cttz_zero_undef.

Differential Revision: http://reviews.llvm.org/D4813


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215330 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-10 22:49:54 +00:00
Saleem Abdulrasool
3e5734dc38 ARM: correct isPredicable for MULS in ThHUMB mode
The ARM ARM states that CPSR may not be updated by a MUL in thumb mode.  Due to
an ordering of Thumb 2 Size Reduction and If Conversion, we would end up
generating a THUMB MULS inside an IT block.

The If Conversion pass uses the TTI isPredicable method to ensure that it can
transform a Basic Block.  However, because we only check for IT handling on
Thumb2 functions, we may miss some cases.  Even then, it only validates that the
CPSR is not *live* rather than it is not accessed.  This corrects the handling
for that particular case since the same restriction does not hold on the vast
majority of the instructions.

This does prevent the IfConversion optimization from kicking in in certain
cases, but generating correct code is more valuable.  Addresses PR20555.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-10 22:20:37 +00:00
Joerg Sonnenberger
4417c25b03 @l and friends adjust their value depending the context used in.
For ori, they are unsigned, for addi, signed. Create a new target
expression type to handle this and evaluate Fixups accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-10 12:41:50 +00:00
Joerg Sonnenberger
901a1b8885 Fix tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215311 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-10 11:37:07 +00:00
Joerg Sonnenberger
b2b363408b If available, pass down the Fixup object to EvaluateAsRelocatable.
At least on PowerPC, the interpretation of certain modifiers depends on
the context they appear in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-10 11:35:12 +00:00
Saleem Abdulrasool
f96cd1aeb5 ADT: remove MinGW32 and Cygwin OSType enum
Remove the MinGW32 and Cygwin types from the OSType enumeration.  These values
are represented via environments of Windows.  It is a source of confusion and
needlessly clutters the code.  The cost of doing this is that we must sink the
check for them into the normalization code path along with the spelling.

Addresses PR20592.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215303 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-09 23:12:20 +00:00
Sanjay Patel
21327ec3e9 fixed typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-09 22:23:02 +00:00
Aaron Ballman
c399631168 Resolving some type truncation warnings in MSVC (enum to bool in this case). No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215293 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-09 19:53:34 +00:00