Reid Spencer
eac65746d7
Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"
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parameter on ConstantInt::get to indicate the signedness of the intended
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:22 +00:00
Reid Spencer
7fc44c8c5f
Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a
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negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35181 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:39:08 +00:00
Reid Spencer
3a34137548
Implement extension of sign bits for negative values in the uint64_t
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constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35180 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:37:47 +00:00
Anton Korobeynikov
d437db1b7b
Fix mingw32 build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:19:08 +00:00
Reid Spencer
93c40036c8
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35174 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:40:50 +00:00
Reid Spencer
186a43f1ad
For PR1248:
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Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:39:36 +00:00
Reid Spencer
4e0422c7e6
Add and Operator== method to ValID so equality can be done properly for
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named or numbered ValIDs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:34:28 +00:00
Reid Spencer
590b3c559f
For PR1258:
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Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35171 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:32:53 +00:00
Chris Lattner
a9d1a843fc
fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35169 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:57 +00:00
Evan Cheng
757072d954
Remove -reduce-joining-phys-regs options. Make it on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6
Special LDR instructions to load from non-pc-relative constantpools. These are
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rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417
Constant generation instructions are re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f
Added isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Evan Cheng
79b098445b
Minor bug fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Chris Lattner
d435dbcbf9
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
8bf9911932
implement the next chunk of SROA with memset/memcpy's of aggregates. This
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implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:16:43 +00:00
Nick Lewycky
3f64b1ab1d
Clean up this code and fix subtract miscompile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:58:46 +00:00
Chris Lattner
318bf7963a
Implement InstCombine/and-xor-merge.ll:test[12].
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Rearrange some code to simplify it now that shifts are binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:51:34 +00:00
Chris Lattner
11a3a9d27d
minor updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37
This is implemented. We now generate:
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entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Evan Cheng
cf596c54d4
- Merge UsedBlocks info after two virtual registers are coalesced.
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- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647
Keep UsedBlocks info accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00
Nick Lewycky
1eda0f60d7
Propagate ValueRanges across equality.
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Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 01:09:32 +00:00
Anton Korobeynikov
1cc6452181
Silence warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 14:48:06 +00:00
Evan Cheng
c6a2410d58
Track the BB's where each virtual register is used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:29:54 +00:00
Evan Cheng
ba1a3df608
Joining a live interval of a physical register with a virtual one can turn out
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to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:27:35 +00:00
Evan Cheng
db264ae07f
Use SmallSet instead of std::set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:53:30 +00:00
Evan Cheng
2edd563825
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
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in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:22:49 +00:00
Devang Patel
84f7fd2483
Support 'I' inline asm constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4
Only ARMv6 has BSWAP.
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Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Evan Cheng
9e2d86add8
Turn on GEP index sinking by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 18:32:30 +00:00
Evan Cheng
9f5ead9601
Stupid bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 17:50:20 +00:00
Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
3cd4e5095b
Sink a binary expression into its use blocks if it is a loop invariant
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computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:46:27 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
14245a9d62
Added isLegalAddressExpression hook to test if the given expression can be
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folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Nick Lewycky
4c70875774
Add more comments and update to new asm syntax.
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Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 02:37:39 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
56fdd7af88
Debugging output stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:19:28 +00:00
Evan Cheng
c6deb3d447
Estimate a cost using the possible number of scratch registers required and use
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it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:43:40 +00:00
Evan Cheng
ba693005e9
Under X86-64 large code model, do not emit 32-bit pc relative calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b
Notes about codegen issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769
Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863
X86-64 JIT is in large code model. Need stubs for direct calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e
x86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b
Preliminary support for X86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:44:30 +00:00
Zhou Sheng
adc149549d
ShiftAmt might equal to zero. Handle this situation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 09:07:33 +00:00
Zhou Sheng
9670445cd4
Enable KnownZero/One.clear().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 03:21:24 +00:00