6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-06 23:32:27 +00:00
Code Issues Projects Releases Wiki Activity
53,457 Commits 39 Branches 0 Tags
Commit Graph

12769 Commits

Author SHA1 Message Date
Chris Lattner
84d8bf9d28 simplify by using the twine form of GetOrCreateSymbol 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84565 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 23:05:23 +00:00
Jim Grosbach
6009751244 Enable allocation of R3 in Thumb1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:57:03 +00:00
Chris Lattner
5a207897bc use EmitLabel instead of text emission 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:51:16 +00:00
Chris Lattner
7c5b021793 add a twine version of MCContext::GetOrCreateSymbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84561 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:49:00 +00:00
Chris Lattner
a70e644820 lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries 
like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:33:05 +00:00
Jim Grosbach
d482f55af1 Adjust the scavenge register spilling to allow the target to choose an 
appropriate restore location for the spill as well as perform the actual
save and restore.

The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84554 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:27:30 +00:00
Chris Lattner
4d15222341 add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84553 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:23:04 +00:00
Chris Lattner
e306d8d6cc add register list and hacked up addrmode #4 support, we now get this: 
_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84546 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:09:23 +00:00
Chris Lattner
3310a963cf revert r84540, fixing build breakage I didn't see because of 
broken makefile deps :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84544 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:59:25 +00:00
Chris Lattner
084f87d445 add addrmode2 support, getting us up to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:57:05 +00:00
Chris Lattner
6f99776f6c add jump tables, constant pools and some trivial global 
lowering stuff.  We can now compile hello world to:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 
	ldr r0, 
	bl _printf
	ldr r0, 
	mov sp, r7
	ldm , 

Almost looks like arm code :)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84542 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:53:00 +00:00
Chris Lattner
83e43ca1b6 pass mangler in as a reference instead of a pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84540 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:45:31 +00:00
Chris Lattner
8514e21deb reduce #includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84536 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:23:15 +00:00
Chris Lattner
61d35c273e add printing support for SOImm operands, getting us to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 21:21:39 +00:00
Chris Lattner
8bc86cba60 wire up some basic printOperand goodness, giving us stuff like this before 
we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84532 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 20:59:55 +00:00
Chris Lattner
9cf0eb5e58 add the files that go with the previous rev 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84531 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 20:21:05 +00:00
Chris Lattner
97f0693744 wire up skeletal support for having llc print instructions 
through mcinst lowering -> mcinstprinter, when llc is passed
the -enable-arm-mcinst-printer flag.  Currently this
is very "aborty".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84530 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 20:20:46 +00:00
Chris Lattner
6a71afaec1 wire up ARM's printMCInst method. Now llvm-mc should be able to produce 
"something" when printing MCInsts, it will just be missing all the 
operand info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84528 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 19:59:05 +00:00
Chris Lattner
fd60382e75 stub out a minimal ARMInstPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84527 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 19:56:26 +00:00
Chris Lattner
172862a2a7 remove strings from instructions who are never asmprinted. 
All of these "subreg32" modifier instructions are handled
explicitly by the MCInst lowering phase.  If they got to
the asmprinter, they would explode.  They should eventually
be replace with correct use of subregs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84526 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 19:51:42 +00:00
Chris Lattner
b8f64a72d8 simplify code, reducing string thrashing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84521 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:49:14 +00:00
Chris Lattner
e4d9ea83c0 switch hidden gv stubs to use MachineModuleInfoMachO instead of a custom map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:44:38 +00:00
Chris Lattner
b0f294c14b use MachineModuleInfoMachO for non-lazy gv stubs instead of a private map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:38:33 +00:00
Chris Lattner
ee8b32981e remove dead map 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:11:25 +00:00
Chris Lattner
a10343f039 don't bother trying to avoid emitting redundant constant pool alignment directives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84512 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:08:02 +00:00
Chris Lattner
fc5451e82f remove accidental comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84510 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:03:41 +00:00
Chris Lattner
74cd3b7ceb emit .subsections_via_symbols through MCStreamer instead of textually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84509 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 18:03:08 +00:00
Chris Lattner
4a071d667d cleanup doFinalization -> EmitEndOfAsmFile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 17:59:19 +00:00
Nate Begeman
ed748a0677 PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 17:31:16 +00:00
Torok Edwin
6602922878 Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS. 
LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 11:00:58 +00:00
Nate Begeman
a09008bf6d Add support for matching shuffle patterns with palignr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 02:17:23 +00:00
Evan Cheng
d36076e4a3 Turn on post-alloc scheduling for x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-18 19:57:27 +00:00
Evan Cheng
eb6e1daa43 Oops. I forgot to change the tests first. Disable post-alloc scheduling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84425 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-18 18:31:31 +00:00
Evan Cheng
ff89dcb06f -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed 
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot 
move above a store of spill slot #2. 
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-18 18:16:27 +00:00
Evan Cheng
20270c9093 Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84411 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-18 06:27:36 +00:00
Evan Cheng
491f54f1fd Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-17 09:20:14 +00:00
Evan Cheng
6553155172 Revert 84315 for now. Re-thinking the patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-17 07:53:04 +00:00
Evan Cheng
bf125583f8 Rename getFixedStack to getStackObject. The stack objects represented are not 
necessarily fixed. Only those will negative frame indices are "fixed."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-17 06:22:26 +00:00
Victor Hernandez
a276c603b8 Remove MallocInst from LLVM Instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84299 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-17 01:18:07 +00:00
Evan Cheng
fa16354e03 Change createPostRAScheduler so it can be turned off at llc -O1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 21:06:15 +00:00
Benjamin Kramer
6f892bbaf9 Update CMake file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 10:29:08 +00:00
Sanjiv Gupta
5386a35c5a Cleaned up some code. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84251 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 08:58:34 +00:00
Evan Cheng
b46aea1032 I am no spelling bee. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84250 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 06:18:09 +00:00
Evan Cheng
d3dd50fec0 Enable post-alloc scheduling for all ARM variants except for Thumb1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 06:11:08 +00:00
Evan Cheng
fee0c1074c Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 05:33:58 +00:00
Bob Wilson
1dd4348408 Fix more NEON instruction encodings. 
Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84243 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-16 03:58:44 +00:00
Bob Wilson
934f98b536 Revert svn r80498 and replace it with a different solution. The only problem 
I can see with the original code was that I forgot that this runs after
type legalization and hence the result type will always be i32. (Custom
legalization of EXTRACT_VECTOR_ELT is only enabled for vector types with
8- and 16-bit elements.)

Regarding the FIXME comment: any information about sign and zero-extension
should be captured by separate extension operations.  The DAG combiner should
handle those to produce either VGETLANEu or VGETLANEs, and that seems to be
working now.  If there are cases that we're missing, let me know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 23:12:05 +00:00
Anton Korobeynikov
4fac9470c4 Dllexport stuff cleanup: 
1. Emit external function type information for all COFF targets since it's
a feature of object format
2. Emit linker directives only for cygming (since this is ld-specific stuff)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 22:36:18 +00:00
Sandeep Patel
452b54a8ae Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 22:25:32 +00:00
Bob Wilson
6f122625dd Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements. 
Patch by Johnny Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-15 21:57:47 +00:00